Chun-Hsing Shih

According to our database, Chun-Hsing Shih authored at least 7 papers between 2004 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

Impact of gate-to-source/drain misalignments on source-side injection Schottky barrier charge-trapping memory cells evaluated using numerical programming-trapping iterations.

Chun-Hsing Shih, Yen-Hsiang Lo, Yu-Hsuan Chen, Jr-Jie Tsai

Microelectron. Reliab., 2017

2016

Different scalabilities of N- and P-type tunnel field-effect transistors with Si/SiGe heterojunctions.

Nguyen Dang Chien, Nguyen Thi Thu, Chun-Hsing Shih, Luu The Vinh

Proceedings of the International Conference on IC Design and Technology, 2016

2015

Short-channel effect and device design of extremely scaled tunnel field-effect transistors.

Nguyen Dang Chien, Chun-Hsing Shih

Microelectron. Reliab., 2015

Reliability impacts of high-speed 3-bit/cell Schottky barrier nanowire charge-trapping memories.

Wei Chang, Chun-Hsing Shih, Yan-Xiang Luo, Wen-Fa Wu, Chen-Hsin Lien

Microelectron. Reliab., 2015

Iterative programming analysis of dopant-segregated multibit/cell Schottky barrier charge-trapping memories.

Yu-Hsuan Chen, Jr-Jie Tsai, Yan-Xiang Luo, Chun-Hsing Shih

Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015

2013

Quantum confinement effect in strained-Si1-xGex double-gate tunnel field-effect transistors.

Nguyen Dang Chien, Chun-Hsing Shih, Luu The Vinh, Nguyen Van Kien

Proceedings of 2013 International Conference on IC Design & Technology, 2013

2004

Design strategy of localized halo profile for achieving sub-50 nm bulk MOSFET.

Chun-Hsing Shih, Yi-Min Chen, Chen-Hsin Lien

Microelectron. Reliab., 2004