Chun-Yeh Liu

According to our database, Chun-Yeh Liu authored at least 3 papers between 1987 and 1995.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1995

An optimized testable architecture for finite state machines.

Ting-Yu Kuo, Chun-Yeh Liu, Kewal K. Saluja

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

1993

An efficient algorithm for bipartite PLA folding.

Chun-Yeh Liu, Kewal K. Saluja

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

1987

BIST-PLA: A Built-in Self-Test Design of Large Programmable Logic Arrays.

Chun-Yeh Liu, Kewal K. Saluja, Shambhu J. Upadhyaya

Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987