Chung-Chih Hsiao

According to our database1, Chung-Chih Hsiao authored at least 3 papers in 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2005
Four-Valued Memory Circuit Designed by Multiple-Peak MOS-NDR Devices and Circuits.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

Novel Voltage-Controlled Oscillator Design by MOS-NDR Devices and Circuits.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

Logic Circuit Design Based on MOS-NDR Devices and Circuits Fabricated by CMOS Process.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005


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