Chung-Lun Tu
Orcid: 0009-0005-9669-6886
According to our database1,
Chung-Lun Tu authored at least 7 papers
between 2022 and 2026.
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Bibliography
2026
High Throughput LDPC Decoder with Ultra-low BER Using Hardware Sharing across Two Code Rates for IEEE Std. 802.15.3d.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
Neural Network-Based Contiguous Carrier Aggregation Digital Predistortion Design for Sub-THz Power Amplifier in Baseband Transmitter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
2025
Synchronization and Channel Estimation Design for Multi-Stream MIMO System in Sub-Terahertz Channel Model.
IEEE Open J. Circuits Syst., 2025
2024
Channel Estimation and Equalization Design with SNR Decision Based Universal Threshold for Sub-THz Single Carrier Baseband Receiver.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Online Self-Adaptive Estimation and Compensation Design for DC Voltage Offset, Frequency-Independent, and Frequency-Dependent IQ Mismatch in Sub-THz Digital Baseband Transceiver.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
Offline and Time-variant EVD-based Closed-loop Digital Predistortion Design for Sub-THz Power Amplifier Array in Basedband Transmitter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
Compressive Sensing Based Hardware Design for Channel Estimation of Wideband Millimeter Wave Hybrid MIMO System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022