Yi-Shan Huang
According to our database1,
Yi-Shan Huang authored at least 6 papers
between 2015 and 2026.
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Bibliography
2026
High Throughput LDPC Decoder with Ultra-low BER Using Hardware Sharing across Two Code Rates for IEEE Std. 802.15.3d.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
Neural Network-Based Contiguous Carrier Aggregation Digital Predistortion Design for Sub-THz Power Amplifier in Baseband Transmitter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
2025
A Deep Learning Accelerator for Modified YOLOv7-tiny with Shortcut-Aware Layer Fusion.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
A 128 Gb/s LDPC Decoder Using Partial Syndrome-based Dynamic Decoding Scheme for Terahertz Wireless Multi-Media Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2016
2015
Current Sensor Fault Diagnosis Based on a Sliding Mode Observer for PMSM Driven Systems.
Sensors, 2015