Chung-Yun Chou

According to our database, Chung-Yun Chou authored at least 5 papers between 2001 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

7.3 A 40nm low-power transceiver for LTE-A Carrier Aggregation.

Chinq-Shiun Chiu, Shih-Chieh Yen, Chi-Yao Yu, Tzung-Han Wu, Chung-Yun Chou, Sheng-Che Tseng, Chih-Hsien Shen, Yu-Tsung Lu, Hsinhung Chen, Song-Yu Yang, Yen-Tso Chen, Guang-Kaai Dehng, Yangjian Chen, Christophe Beghein, Dimitris Nalbantis, Manel Collados, Bernard Tenbroek, Jonathan Strange, Caiyi Wang

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2005

The design of wideband and low-power CMOS active polyphase filter and its application in RF double-quadrature receivers.

Chung-Yun Chou, Chung-Yu Wu

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

2004

A 5-GHz CMOS double-quadrature receiver front-end with single-stage quadrature generator.

Chung-Yu Wu, Chung-Yun Chou

IEEE J. Solid State Circuits, 2004

2002

The design of a new wideband and low-power CMOS active polyphase filter for low-IF receiver applications.

Chung-Yun Chou, Chung-Yu Wu

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2001

The design of a CMOS IF bandpass amplifier with low sensitivity to process and temperature variations.

Chung-Yu Wu, Chung-Yun Chou

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001