Tzung-Han Wu

According to our database, Tzung-Han Wu authored at least 11 papers between 2005 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

RFIC and RF Module for 5G Applications.

Ming-Da Tsai, Song-Yu Yang, Chi-Yao Yu, Ping-Yu Chen, Tzung-Han Wu, Mohammed Hassan, Chi-Tsan Chen, Chao-Wei Wang, Yen-Chuan Huang, Li-Han Huang, Wei-Hao Chiu, Anson Lin, Bo-Yu Lin, Arnaud Werquin, Chien-Cheng Lin, Yen-Horng Chen, Jen-Che Tsai, Yuan-Yu Fu, Bernard Tenbroek, Chinq-Shiun Chiu, Yi-Bin Lee, Guang-Kaai Dehng

Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

10.3 A 12nm CMOS RF Transceiver Supporting 4G/5G UL MIMO.

Ming-Da Tsai, Song-Yu Yang, Chi-Yao Yu, Ping-Yu Chen, Tzung-Han Wu, Mohammed Hassan, Chi-Tsan Chen, Chao-Wei Wang, Yen-Chuan Huang, Li-Han Hung, Wei-Hao Chiu, Anson Lin, Bo-Yu Lin, Arnaud Werquin, Chien-Cheng Lin, Yen-Horng Chen, Jen-Che Tsai, Yuan-Yu Fu, Bernard Tenbroek, Chinq-Shiun Chiu, Yi-Bin Lee, Guang-Kaai Dehng

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2017

7.3 A 40nm low-power transceiver for LTE-A Carrier Aggregation.

Chinq-Shiun Chiu, Shih-Chieh Yen, Chi-Yao Yu, Tzung-Han Wu, Chung-Yun Chou, Sheng-Che Tseng, Chih-Hsien Shen, Yu-Tsung Lu, Hsinhung Chen, Song-Yu Yang, Yen-Tso Chen, Guang-Kaai Dehng, Yangjian Chen, Christophe Beghein, Dimitris Nalbantis, Manel Collados, Bernard Tenbroek, Jonathan Strange, Caiyi Wang

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2013

A 65-nm GSM/GPRS/EDGE SoC With Integrated BT/FM.

Tzung-Han Wu, Hsiang-Hui Chang, Shin-Fu Chen, Chinq-Shiun Chiu, Li-Shin Lai, Chi-Hsueh Wang, Song-Yu Yang, Ta-Hsin Lin, Jhy-Rong Chen, Hung-Chieh Tsai, Chi-Yao Yu, Sheng-Yuan Su, Tai-Yuan Yu, Chieh-Chuan Chin, Guang-Kaai Dehng, Augusto Marques, Caiyi Wang, George Chien

IEEE J. Solid State Circuits, 2013

2011

A SAW-Less GSM/GPRS/EDGE Receiver Embedded in 65-nm SoC.

Chi-Yao Yu, Ivan Siu-Chuang Lu, Yen-Horng Chen, Lan-chou Cho, Chih-hao Eric Sun, Chih-Chun Tang, Hsiang-Hui Chang, Wen-Chang Lee, Sheng-Jui Huang, Tzung-Han Wu, Chinq-Shiun Chiu, George Chien

IEEE J. Solid State Circuits, 2011

2009

Analysis and Design of the 0.13- muhboxm CMOS Shunt-Series Series-Shunt Dual-Feedback Amplifier.

Tzung-Han Wu, Jin-Siang Syu, Chinchun Meng

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2007

A 5.2 GHz 47 dB Image Rejection Double Quadrature Gilbert Downconverter Using 0.35 µm SiGe HBT Technology.

Tzung-Han Wu, Chinchun Meng, Tse-Hung Wu, Guo-Wei Huang

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

10-GHz SiGe BiCMOS Sub-Harmonic Gilbert Mixer Using the Fully Symmetrical and Time-Delay Compensated LO Cells.

Tzung-Han Wu, Chinchun Meng

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

2006

5.2/5.7-GHz 48-dB Image Rejection GaInP/GaAs HBT Weaver Down-Converter Using LO Frequency Quadrupler.

Tzung-Han Wu, Chinchun Meng

IEEE J. Solid State Circuits, 2006

Almost disturbance decoupling of nonlinear systems with mismatch uncertainties via feedback linearization approach and fuzzy logic control.

Chung-Cheng Chen, Tzung-Han Wu, Ying-Jen Chen

J. Intell. Fuzzy Syst., 2006

2005

A 5.7 GHz Gilbert Upconversion Mixer with an LC Current Combiner Output Using 0.35 µm SiGe HBT Technology.

Tzung-Han Wu, Chinchun Meng, Tse-Hung Wu, Guo-Wei Huang

IEICE Trans. Electron., 2005