Costas Galanopoulos

According to our database1, Costas Galanopoulos authored at least 6 papers between 2006 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
Merged Switch Allocation and Traversal in Network-on-Chip Switches.
IEEE Trans. Computers, 2013

2008
Low-Power Leading-Zero Counting and Anticipation Logic for High-Speed Floating Point Units.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Fast arbiters for on-chip network switches.
Proceedings of the 26th International Conference on Computer Design, 2008

2007
Sorter Based Permutation Units for Media-Enhanced Microprocessors.
IEEE Trans. Very Large Scale Integr. Syst., 2007

2006
Fast bit permutation unit for media enhanced microprocessors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

An Energy-Delay Efficient Subword Permutation Unit.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006


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