Daniel Becker

Affiliations:
  • Siemens AG, Germany
  • Forschungszentrum Jülich, Germany (former)
  • RWTH Aachen University, Germany (PhD 2009)


According to our database1, Daniel Becker authored at least 23 papers between 2005 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Efficient Analysis at Edge.
Proceedings of the Companion Proceedings of the 8th ACM/SPEC on International Conference on Performance Engineering, 2017

2014
Performance evaluation of the Intel Xeon Phi manycore architecture using parallel video-based driver assistance algorithms.
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

2013
Extending the scope of the controlled logical clock.
Clust. Comput., 2013

Parallel implementation of real-time semi-global matching on embedded multi-core architectures.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

2012
A Dynamic Accelerator-Cluster Architecture.
Proceedings of the 41st International Conference on Parallel Processing Workshops, 2012

2011
Patterns of Inefficient Performance Behavior in GPU Applications.
Proceedings of the 19th International Euromicro Conference on Parallel, 2011

2010
Timestamp synchronization of concurrent events.
PhD thesis, 2010

The Scalasca performance toolset architecture.
Concurr. Comput. Pract. Exp., 2010

Synchronizing the Timestamps of Concurrent Events in Traces of Hybrid MPI/OpenMP Applications.
Proceedings of the 2010 IEEE International Conference on Cluster Computing, 2010

2009
Replay-based synchronization of timestamps in event traces of massively parallel applications.
Scalable Comput. Pract. Exp., 2009

Scalable timestamp synchronization for event traces of message-passing applications.
Parallel Comput., 2009

Recent Developments in the Scalasca Toolset.
Proceedings of the Tools for High Performance Computing 2009, 2009

2008
Usage of the SCALASCA toolset for scalable performance analysis of large-scale parallel applications.
Proceedings of the Tools for High Performance Computing, 2008

Performance Evaluation and Optimization of Parallel Grid Computing Applications.
Proceedings of the 16th Euromicro International Conference on Parallel, 2008

Grid-Based Workflow Management.
Proceedings of the Grid and Services Evolution, 2008

Implications of non-constant clock drifts for the timestamps of concurrent events.
Proceedings of the 2008 IEEE International Conference on Cluster Computing, 29 September, 2008

2007
Application of deterministic and stochastic Petri-Nets for performance modeling of NoC architectures.
J. Syst. Archit., 2007

Hybrid functional- and instruction-level power modeling for embedded and heterogeneous processor architectures.
J. Syst. Archit., 2007

Timestamp Synchronization for Event Traces of Large-Scale Message-Passing Applications.
Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface, 14th European PVM/MPI User's Group Meeting, Paris, France, September 30, 2007

Scalability and Usability of HPC Programming Tools.
Proceedings of the Parallel Computing: Architectures, 2007

Automatic Trace-Based Performance Analysis of Metacomputing Applications.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2006
Hybrid Functional and Instruction Level Power Modeling for Embedded Processors.
Proceedings of the Embedded Computer Systems: Architectures, 2006

2005
Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets.
Proceedings of the Embedded Computer Systems: Architectures, 2005


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