Florian Giesemann

Orcid: 0000-0002-4200-4988

According to our database1, Florian Giesemann authored at least 10 papers between 2009 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
TUKUTURI: eine dynamisch selbstrekonfigurierbare Softcore Prozessorarchitektur.
PhD thesis, 2021

2020
Evolutionary Algorithms for Instruction Scheduling, Operation Merging, and Register Allocation in VLIW Compilers.
J. Signal Process. Syst., 2020

2019
Dynamic self-reconfiguration of a MIPS-based soft-core processor architecture.
J. Parallel Distributed Comput., 2019

2017
Using a genetic algorithm approach to reduce register file pressure during instruction scheduling.
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

Application-specific soft-core vector processor for advanced driver assistance systems.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

2015
Exploring Dynamic Reconfigurable CORDIC Co-Processors Tightly Coupled with a VLIW-SIMD Soft-Processor Architecture.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014
A comprehensive ASIC/FPGA prototyping environment for exploring embedded processing systems for advanced driver assistance applications.
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

Performance evaluation of the Intel Xeon Phi manycore architecture using parallel video-based driver assistance algorithms.
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

2009
Instruction merging to increase parallelism in VLIW architectures.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009


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