Daniel Pollex

According to our database1, Daniel Pollex authored at least 5 papers between 2006 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2011
A 56GS/S 6b DAC in 65nm CMOS with 256×6b memory.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
A 40GS/s 6b ADC in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
Clock recovery for a 40 Gb/s QPSK optical receiver.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
A 24GS/s 6b ADC in 90nm CMOS.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2006
A 22GS/s 5b adc in 0.13µm SiGe BiCMOS.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006


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