David de Andrés

Orcid: 0000-0002-4744-3795

Affiliations:
  • Technical University of Valencia, Spain


According to our database1, David de Andrés authored at least 52 papers between 2000 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2023
BAFFI: a bit-accurate fault injector for improved dependability assessment of FPGA prototypes.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
A Multi-Criteria Analysis of Benchmark Results With Expert Support for Security Tools.
IEEE Trans. Dependable Secur. Comput., 2022

Reversing FPGA architectures for speeding up fault injection: does it pay?
Proceedings of the 18th European Dependable Computing Conference, 2022

2020
Improving Robustness-Aware Design Space Exploration for FPGA-Based Systems.
Proceedings of the 16th European Dependable Computing Conference, 2020

2019
Simulating the effects of logic faults in implementation-level VITAL-compliant models.
Computing, 2019

Robustness-Aware Design Space Exploration Through Iterative Refinement of D-Optimal Designs.
Proceedings of the 15th European Dependable Computing Conference, 2019

2018
Tuning synthesis flags to optimize implementation goals: Performance and robustness of the LEON3 processor as a case study.
J. Parallel Distributed Comput., 2018

Speeding-Up Robustness Assessment of HDL Models through Profiling and Multi-Level Fault Injection.
Proceedings of the 8th Latin-American Symposium on Dependable Computing, 2018

Accurate Robustness Assessment of HDL Models Through Iterative Statistical Fault Injection.
Proceedings of the 14th European Dependable Computing Conference, 2018

DAVOS: EDA Toolkit for Dependability Assessment, Verification, Optimisation and Selection of Hardware Models.
Proceedings of the 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2018

2017
Accurately Simulating the Effects of Faults in VHDL Models Described at the Implementation-Level.
Proceedings of the 13th European Dependable Computing Conference, 2017

Dependability-Aware Design Space Exploration for Optimal Synthesis Parameters Tuning.
Proceedings of the 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2017

2016
Multi-criteria analysis of measures in benchmarking: Dependability benchmarking as a case study.
J. Syst. Softw., 2016

Speeding-Up Simulation-Based Fault Injection of Complex HDL Models.
Proceedings of the 2016 Seventh Latin-American Symposium on Dependable Computing, 2016

2015
REFRAHN: A Resilience Evaluation Framework for Ad Hoc Routing Protocols.
Comput. Networks, 2015

Increasing the Dependability of VLSI Systems through Early Detection of Fugacious Faults.
Proceedings of the 11th European Dependable Computing Conference, 2015

Analysis and RTL correlation of instruction set simulators for automotive microcontroller robustness verification.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
From Measures to Conclusions Using Analytic Hierarchy Process in Dependability Benchmarking.
IEEE Trans. Instrum. Meas., 2014

Ambient noise in wireless mesh networks: Evaluation and proposal of an adaptive algorithm to mitigate link removal.
J. Netw. Comput. Appl., 2014

A survey of evaluation platforms for ad hoc routing protocols: A resilience perspective.
Comput. Networks, 2014

Gaining Confidence on Dependability Benchmarks' Conclusions through "Back-to-Back" Testing (Practical Experience Report).
Proceedings of the 2014 Tenth European Dependable Computing Conference, 2014

2013
Preventing Memory Errors in Networked Vehicle Services Through Diversification.
Proceedings of the SAFECOMP 2013, 2013

Analysis of results in dependability benchmarking: Can we do better?
Proceedings of the 2nd IEEE International Workshop on Measurements & Networking, 2013

Open Challenges in the Resilience Evaluation of Ad Hoc Networks.
Proceedings of the Dependable Computing - 14th European Workshop, 2013

Improving the Transfer of Safety and Security Competences to Industry: The RISKY Approach.
Proceedings of the Dependable Computing - 14th European Workshop, 2013

The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs.
Proceedings of the Dependable Computing - 14th European Workshop, 2013

Fault Tolerance on NoCs.
Proceedings of the 27th International Conference on Advanced Information Networking and Applications Workshops, 2013

2012
Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Mitigating the impact of ambient noise on Wireless Mesh Networks using adaptive link-quality-based packet replication.
Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks, 2012

Towards changing the user perception of mobile communications through geotagged information.
Proceedings of the 1st European Workshop on AppRoaches to MObiquitous Resilience, 2012

An aspect-oriented approach to face neighbour saturation issues in proactive ad hoc routing protocols: olsrd as a case study.
Proceedings of the 1st European Workshop on AppRoaches to MObiquitous Resilience, 2012

2011
Towards benchmarking routing protocols in wireless mesh networks.
Ad Hoc Networks, 2011

Resilience-Driven Parameterisation of Ad Hoc Routing Protocols: olsrd as a Case Study.
Proceedings of the 30th IEEE Symposium on Reliable Distributed Systems (SRDS 2011), 2011

Using Dependability Benchmarks to Support ISO/IEC SQuaRE.
Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing, 2011

Using Performance, Energy Consumption, and Resilience Experimental Measures to Evaluate Routing Protocols for Ad Hoc Networks.
Proceedings of The Tenth IEEE International Symposium on Networking Computing and Applications, 2011

On Selecting Representative Faultloads to Guide the Evaluation of Ad Hoc Networks.
Proceedings of the 5th Latin-American Symposium on Dependable Computing, 2011

Coarse-grained resilience benchmarking using logic score of preferences: ad hoc networks as a case study.
Proceedings of the 13th European Workshop on Dependable Computing, 2011

2010
Attack Injection to Support the Evaluation of Ad Hoc Networks.
Proceedings of the 29th IEEE Symposium on Reliable Distributed Systems (SRDS 2010), New Delhi, Punjab, India, October 31, 2010

2009
An Attack Injection Approach to Evaluate the Robustness of Ad Hoc Networks.
Proceedings of the 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing, 2009

Using Dependability, Performance, Area and Energy Consumption Experimental Measures to Benchmark IP Cores.
Proceedings of the Fourth Latin-American Symposium on Dependable Computing, 2009

Design and Deployment of a Generic ECC-based Fault Tolerance Mechanism for Embedded HW Cores.
Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2009

Technologies for the Development of Dependable and Secure Component-based Embedded Systems: TecnoSeC Project.
Proceedings of the 2009 International Conference on Embedded Systems & Applications, 2009

2008
Fault Emulation for Dependability Evaluation of VLSI Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Generic Design and Automatic Deployment of NMR Strategies on HW Cores.
Proceedings of the 14th IEEE Pacific Rim International Symposium on Dependable Computing, 2008

Dependability Assessment for the Selection of Embedded Cores.
Proceedings of the Seventh European Dependable Computing Conference, 2008

2006
FADES: a fault emulation tool for fast dependability assessment.
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

Fast Emulation of Permanent Faults in VLSI Systems.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems.
Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN 2006), 2006

2005
Fast Run-Time Reconfiguration for SEU Injection.
Proceedings of the Dependable Computing, 2005

2004
Codesign methodology for computer vision applications.
Microprocess. Microsystems, 2004

2003
INERTE: Integrated NExus-Based Real-Time Fault Injection Tool for Embedded Systems.
Proceedings of the 2003 International Conference on Dependable Systems and Networks (DSN 2003), 2003

2000
An alternative to unify performance and reliability analysis of industrial applications.
Proceedings of the 14<sup>th</sup> European Simulation Multiconference, 2000


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