Luis J. Saiz

Orcid: 0000-0002-4868-2050

According to our database1, Luis J. Saiz authored at least 18 papers between 2008 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2019
Ultrafast Codes for Multiple Adjacent Error Correction and Double Error Detection.
IEEE Access, 2019

2018
Improving Error Correction Codes for Multiple-Cell Upsets in Space Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes.
Proceedings of the 8th Latin-American Symposium on Dependable Computing, 2018

2016
Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System.
IEEE Trans. Reliab., 2016

Ultrafast Error Correction Codes for Double Error Detection/Correction.
Proceedings of the 12th European Dependable Computing Conference, 2016

2015
MCU Tolerance in SRAMs Through Low-Redundancy Triple Adjacent Error Correction.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Ultrafast Single Error Correction Codes for Protecting Processor Registers.
Proceedings of the 11th European Dependable Computing Conference, 2015

2014
Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor.
IEEE Trans. Reliab., 2014

Modified Hamming Codes to Enhance Short Burst Error Detection in Semiconductor Memories (Short Paper).
Proceedings of the 2014 Tenth European Dependable Computing Conference, 2014

2013
Flexible Unequal Error Control Codes with Selectable Error Detection and Correction Levels.
Proceedings of the Computer Safety, Reliability, and Security, 2013

Defining a Representative and Low Cost Fault Model Set for Intermittent Faults in Microprocessor Buses.
Proceedings of the Sixth Latin-American Symposium on Dependable Computing, 2013

Using Interleaving to Avoid the Effects of Multiple Adjacent Faults in On-Chip Interconnection Lines.
Proceedings of the Dependable Computing - 14th European Workshop, 2013

2012
Studying the effects of intermittent faults on a microcontroller.
Microelectron. Reliab., 2012

Analyzing the Impact of Intermittent Faults on Microprocessors Applying Fault Injection.
IEEE Des. Test, 2012

2010
Searching Representative and Low Cost Fault Models for Intermittent Faults in Microcontrollers: A Case Study.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

Experimental validation of a fault tolerant microcomputer system against intermittent faults.
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010

2008
Injecting intermittent faults for the dependability validation of commercial microcontrollers.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2008

Analysis of the influence of intermittent faults in a microcontroller.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008


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