Dhruv Gajaria

According to our database, Dhruv Gajaria authored at least 9 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey.

Alaba Yusuf, Tosiron Adegbija, Dhruv Gajaria

IEEE Access, 2024

2023

Gpu-based and streaming-enabled implementation of pre-processing flow towards enhancing optical character recognition accuracy and efficiency.

Serhan Gener, Parker Dattilo, Dhruv Gajaria, Alexander Fusco, Ali Akoglu

Clust. Comput., December, 2023

2022

Exploring Domain-Specific Architectures for Energy-Efficient Wearable Computing.

Dhruv Gajaria, Tosiron Adegbija

J. Signal Process. Syst., 2022

Evaluating the performance and energy of STT-RAM caches for real-world wearable workloads.

Dhruv Gajaria, Tosiron Adegbija

Future Gener. Comput. Syst., 2022

A Study of STT-RAM-based In-Memory Computing Across the Memory Hierarchy.

Dhruv Gajaria, Kevin Antony Gomez, Tosiron Adegbija

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

GPGPU-based High Throughput Image Pre-processing Towards Large-Scale Optical Character Recognition.

Serhan Gener, Parker Dattilo, Dhruv Gajaria, Alexander Fusco, Ali Akoglu

Proceedings of the 19th IEEE/ACS International Conference on Computer Systems and Applications, 2022

2020

ECG-Based Authentication Using Timing-Aware Domain-Specific Architecture.

Renato Cordeiro, Dhruv Gajaria, Ankur Limaye, Tosiron Adegbija, Nima Karimian, Fatemeh Tehranipoor

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019

ARC: DVFS-aware asymmetric-retention STT-RAM caches for energy-efficient multicore processors.

Dhruv Gajaria, Tosiron Adegbija

Proceedings of the International Symposium on Memory Systems, 2019

SCART: Predicting STT-RAM Cache Retention Times Using Machine Learning.

Dhruv Gajaria, Kyle Kuan, Tosiron Adegbija

Proceedings of the Tenth International Green and Sustainable Computing Conference, 2019