Diksha Shekhawat

Orcid: 0000-0002-7585-6984

According to our database1, Diksha Shekhawat authored at least 6 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Modeling, hardware architecture, and performance analyses of an AEAD-based lightweight cipher.
J. Real Time Image Process., April, 2024

SAT and SCOPE Attacks on Deceptive Multiplexer Logic Locking.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023
Logic locking for IP security: A comprehensive analysis on challenges, techniques, and trends.
Comput. Secur., June, 2023

Security Evaluation of Lightweight SBoxes.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

PHAc: Posit Hardware Accelerator for Efficient Arithmetic Logic Operations.
Proceedings of the Next Generation Arithmetic - 4th International Conference, 2023

2021
A Hardware Generator for Posit Arithmetic and its FPGA Prototyping.
Proceedings of the 25th International Symposium on VLSI Design and Test, 2021


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