Dingbang Liu
Orcid: 0009-0009-4597-1103
  According to our database1,
  Dingbang Liu
  authored at least 12 papers
  between 2020 and 2025.
  
  
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
  2025
A 28-nm 135.19 TOPS/W Bootstrapped-SRAM Compute-in-Memory Accelerator With Layer-Wise Precision and Sparsity.
    
  
    IEEE Trans. Circuits Syst. I Regul. Pap., July, 2025
    
  
Human attention guided multiagent hierarchical reinforcement learning for heterogeneous agents.
    
  
    Knowl. Based Syst., 2025
    
  
Garbage Collection Does Not Only Collect Garbage: Piggybacking-Style Defragmentation for Deduplicated Backup Storage.
    
  
    Proceedings of the Twentieth European Conference on Computer Systems, 2025
    
  
A Layer-wised Mixed-Precision CIM Accelerator with Bit-level Sparsity-aware ADCs for NAS-Optimized CNNs.
    
  
    Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025
    
  
  2024
Scaling Up Multi-Agent Reinforcement Learning: An Extensive Survey on Scalability Issues.
    
  
    IEEE Access, 2024
    
  
Integrating Suboptimal Human Knowledge with Hierarchical Reinforcement Learning for Large-Scale Multiagent Systems.
    
  
    Proceedings of the Advances in Neural Information Processing Systems 38: Annual Conference on Neural Information Processing Systems 2024, 2024
    
  
  2023
    Proceedings of the 39th IEEE International Conference on Data Engineering, 2023
    
  
RISC-V based Fully-Parallel SRAM Computing-in-Memory Accelerator with High Hardware Utilization and Data Reuse Rate.
    
  
    Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
    
  
  2022
An Energy-Efficient Mixed-Bit CNN Accelerator With Column Parallel Readout for ReRAM-Based In-Memory Computing.
    
  
    IEEE J. Emerg. Sel. Topics Circuits Syst., 2022
    
  
An Energy-Efficient Mixed-Bit ReRAM-based Computing-in-Memory CNN Accelerator with Fully Parallel Readout.
    
  
    Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
    
  
  2021
  2020
    Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020