Dinh Van Luan

Orcid: 0000-0002-5522-1615

According to our database1, Dinh Van Luan authored at least 3 papers between 2017 and 2019.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019
A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation.
ACM Trans. Reconfigurable Technol. Syst., 2019

2018
A New FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation of Operating Condition Variation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Implementation of the XY2-100 protocol on low-cost microcontroller.
Proceedings of the International SoC Design Conference, 2017


  Loading...