Xuan Truong Nguyen

Orcid: 0000-0002-7527-6971

Affiliations:
  • Seoul National University, South Korea


According to our database1, Xuan Truong Nguyen authored at least 19 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2024
A Low-Latency FPGA Accelerator for YOLOv3-Tiny With Flexible Layerwise Mapping and Dataflow.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024

USDN: A Unified Sample-wise Dynamic Network with Mixed-Precision and Early-Exit.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024

Reconfigurable One-Adder Multiplication for CNN Acceleration.
Proceedings of the International Conference on Electronics, Information, and Communication, 2024

Mitigation of Over-Confidence in Scale-Adjusted Training for Early-Exit Networks.
Proceedings of the International Conference on Electronics, Information, and Communication, 2024

2023
Accelerating Super-Resolution Network Inference via Sensitivity-Based Weight Sparsity Allocation.
IEEE Access, 2023

Live Demonstration: Layer-wise Configurable CNN Accelerator with High PE Utilization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

ViT-P3DE∗: Vision Transformer Based Multi-Camera Instance Association with Pseudo 3D Position Embeddings.
Proceedings of the Thirty-Second International Joint Conference on Artificial Intelligence, 2023

Eight-bit Quantization for Super-Resolution Networks and Its Hardware Implementation.
Proceedings of the International Conference on Electronics, Information, and Communication, 2023

2022
An Energy-Efficient YOLO Accelerator Optimizing Filter Switching Activity.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Computation-Skipping Mask Generation for Super-Resolution Networks.
Proceedings of the International Conference on Electronics, Information, and Communication, 2022

A Real-time Super-resolution Accelerator Using a big. LITTLE Core Architecture.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

Improving Deep-Learning-based Optical Music Recognition for Camera-based Inputs.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2020
An Efficient Sampling Algorithm With a K-NN Expanding Operator for Depth Data Acquisition in a LiDAR System.
IEEE Trans. Circuits Syst. Video Technol., 2020

An MAE-aware ROI Sampling Model for LiDAR.
Proceedings of the International SoC Design Conference, 2020

2019
A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation.
ACM Trans. Reconfigurable Technol. Syst., 2019

ROI-Based LiDAR Sampling Algorithm in on-Road Environment for Autonomous Driving.
IEEE Access, 2019

A Hardware-Friendly Compression Algorithm for Profiling DDR4 Memory Accesses.
Proceedings of the International Conference on Electronics, Information, and Communication, 2019

2018
A Low-Cost Hardware Design of a 1-D SPIHT Algorithm for Video Display Systems.
IEEE Trans. Consumer Electron., 2018

A New FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation of Operating Condition Variation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018


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