Dongsheng Wang

Affiliations:
  • Mentor Graphics Corporation, Wilsonville, OR, USA (1998 - 2012)
  • University of California San Diego, Department of Computer Sciences and Engineering, San Diego, CA, USA (1997 - 1998)
  • University of California Berkeley, Department of Electrical Engineering and Computer Sciences, Berkeley, CA, USA (1995 - 1997)


According to our database1, Dongsheng Wang authored at least 9 papers between 1996 and 2005.

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Bibliography

2005
A practical cut-based physical retiming algorithm for field programmable gate arrays.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2003
A Practical ASIC Methdology for Flexible Clock Tree Synthesis with Routing Blockages.
Proceedings of the Integrated Circuit and System Design, 2003

A physical retiming algorithm for field programmable gate arrays.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

1999
A Performance-Driven I/O Pin Routing Algorithm.
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999

1998
A new general connectivity model and its applications to timing-driven Steiner tree routing.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

A Performance-Driven MCM Router with Special Consideration of Crosstalk Reduction.
Proceedings of the 1998 Design, 1998

1997
Post global routing crosstalk synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996
Post global routing crosstalk risk estimation and reduction.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

Performance-Driven Interconnect Global Routing.
Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996


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