Dongwoo Hong

Orcid: 0000-0002-8553-4276

According to our database1, Dongwoo Hong authored at least 16 papers between 2004 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Multi-Output Classification Based on Convolutional Neural Network Model for Untrained Compound Fault Diagnosis of Rotor Systems with Non-Contact Sensors.
Sensors, March, 2023

Active Mitigation Strategy of Structure-Borne Vibration with Complex Frequency Spectra from Asymmetric Plate-like Mounting Systems in Next Generation Mobilities.
Symmetry, 2023

2021
Unsupervised Condition Diagnosis of Linear Motion Guide Using Generative Model Based on Images.
IEEE Access, 2021

2010
Efficient Test Methodologies for High-Speed Serial Links
Lecture Notes in Electrical Engineering 51, Springer, ISBN: 978-90-481-3442-7, 2010

2008
A Clock-Less Jitter Spectral Analysis Technique.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Bit-Error Rate Estimation for Bang-Bang Clock and Data Recovery Circuit in High-Speed Serial Links.
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

Accurate Bit-Error-Rate estimation for efficient high speed I/O testing.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
A two-tone test method for continuous-time adaptive equalizers.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

An Accurate Jitter Estimation Technique for Efficient High Speed I/O Testing.
Proceedings of the 16th Asian Test Symposium, 2007

2006
Bit-Error-Rate Estimation for High-Speed Serial Links.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Bit Error Rate Estimation for Improving Jitter Testing of High-Speed Serial Links.
Proceedings of the 2006 IEEE International Test Conference, 2006

2005
An Efficient Random Jitter Measurement Technique Using Fast Comparator Sampling.
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005

2004
A Scalable On-Chip Jitter Extraction Technique.
Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

BER Estimation for Serial Links Based on Jitter Spectrum and Clock Recovery Characteristics.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Random Jitter Extraction Technique in a Multi-Gigahertz Signal.
Proceedings of the 2004 Design, 2004

Jitter spectral extraction for multi-gigahertz signal.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004


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