C. Patrick Yue
Orcid: 0000-0002-0211-2394
According to our database1,
C. Patrick Yue
authored at least 99 papers
between 1993 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2015, "For contributions to the advancement of CMOS radio-frequency integrated circuits and devices modeling".
Timeline
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Online presence:
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on orcid.org
On csauthors.net:
Bibliography
2024
IEEE J. Solid State Circuits, February, 2024
2023
Adaptive Hybrid Optimization Learning-Based Accurate Motion Planning of Multi-Joint Arm.
IEEE Trans. Neural Networks Learn. Syst., September, 2023
IEEE J. Emerg. Sel. Topics Circuits Syst., June, 2023
Dual-Photodiode Differential Receivers Achieving Double Photodetection Area for Gigabit-Per-Second Optical Wireless Communication.
IEEE J. Solid State Circuits, 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Cross-Dimensional Refined Learning for Real-Time 3D Visual Perception from Monocular Video.
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023
A 2.05-pJ/b 56-Gb/s PAM-4 VCSEL Transmitter with Piecewise Nonlinearity Compensation and Asymmetric Equalization in 40-nm CMOS.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
Optimizing Field-of-View for Multi-Agent Path Finding via Reinforcement Learning: A Performance and Communication Overhead Study.
Proceedings of the 62nd IEEE Conference on Decision and Control, 2023
Design of Chip-to-PCB Matching Network for Millimeter-Wave On-Chip Transmitter and On-PCB Antenna.
Proceedings of the 15th IEEE International Conference on ASIC, 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2022
Camera Pose Estimation Using a VLC-Modulated Single Rectangular LED for Indoor Positioning.
IEEE Trans. Instrum. Meas., 2022
Efficient-Grad: Efficient Training Deep Convolutional Neural Networks on Edge Devices with Gradient Optimizations.
ACM Trans. Embed. Comput. Syst., 2022
Smart Home Control System Using VLC and Bluetooth Enabled AC Light Bulb for 3D Indoor Localization with Centimeter-Level Precision.
Sensors, 2022
VLP Landmark and SLAM-Assisted Automatic Map Calibration for Robot Navigation with Semantic Information.
Robotics, 2022
LiDR: Visible-Light-Communication-Assisted Dead Reckoning for Accurate Indoor Localization.
IEEE Internet Things J., 2022
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
2021
Design and Analysis of Continuous-Mode Doherty Power Amplifier With Second Harmonic Control.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Sensing and Cancellation Circuits for Mitigating EMI-Related Common Mode Noise in High-Speed PAM-4 Transmitter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
IEEE Open J. Circuits Syst., 2021
A 0.25-0.4-V, Sub-0.11-mW/GHz, 0.15-1.6-GHz PLL Using an Offset Dual-Path Architecture With Dynamic Charge Pumps.
IEEE J. Solid State Circuits, 2021
IEEE J. Solid State Circuits, 2021
Technology Report : Robotic Localization and Navigation System for Visible Light Positioning and SLAM.
CoRR, 2021
Efficient Training Convolutional Neural Networks on Edge Devices with Gradient-pruned Sign-symmetric Feedback Alignment.
CoRR, 2021
A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM4 Receiver with a -8-dB JTRAN 40-MHz 0.2-UIPP JTOL Clock and Data Recovery.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
Proceedings of the Picture Coding Symposium, 2021
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2021
Proceedings of the 10th IEEE Global Conference on Consumer Electronics, 2021
An Integrated System Evaluation Engine for Cross-Domain Simulation and Design Optimization of High-Speed 5G Millimeter-Wave Wireless SoCs.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Design and Verification of a 334-Mb/s DCO-OFDM Li-Fi Transceiver Using Integrated System Evaluation Engine.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
On-Chip Filter for Mitigating EMI-Related Common-Mode Noise in High-Speed PAM-4 Transmitter.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Design and Co-Simulation of QPSK and NRZ/PAM-4/PAM-8 VCSEL-Based Optical Links Utilizing an Integrated System Evaluation Engine.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
A 42-dB Ω 25-Gb/s CMOS Transimpedance Amplifier With Multiple-Peaking Scheme for Optical Communications.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
A 0.65-V 12-16-GHz Sub-Sampling PLL With 56.4-fs<sub>rms</sub> Integrated Jitter and -256.4-dB FoM.
IEEE J. Solid State Circuits, 2020
A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Self-Biased PLL-Based Multiphase Clock Generator.
IEEE J. Solid State Circuits, 2020
An RGB-LED Driver with Feed-Forward Equalization Used for PAM-4 Visible Light Communication.
Proceedings of the Machine Learning and Intelligent Communications, 2020
Performance Analysis and Evaluation of Outdoor Visible Light Communication Reception.
Proceedings of the Machine Learning and Intelligent Communications, 2020
A Real-Time RGB PAM-4 Visible Light Communication System Based on a Transceiver Design with Pre- and Post-equalizations.
Proceedings of the Machine Learning and Intelligent Communications, 2020
4.7 A Single-Antenna W-Band FMCW Radar Front-End Utilizing Adaptive Leakage Cancellation.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
A 0.25-0.4V, Sub-0.11mW/GHz, 0.15-1.6GHz PLL Using an Offset Dual-Path Loop Architecture with Dynamic Charge Pumps.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
A 0.65V 12-to-16GHz Sub-Sampling PLL with 56.4fsrms Integrated Jitter and -256.4dB FoM.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019
Design of a Real-Time Visible Laser Light Communication System with Basedband in FPGA for High Definition video Transmission.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019
A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Low-Power Multiphase Clock Generator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
EMI-Related Common-Mode (CM) Noise Analysis and Prediction of High-Speed Source-Series Terminated (SST) I/O Driver in System-on-Package (SOP).
IEEE Trans. Circuits Syst. II Express Briefs, 2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
EMI common-mode (CM) noise suppression from self-calibration of high-speed SST driver using on-chip process monitoring circuit.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
A low-power PAM4 receiver using 1/4-rate sampling decoder with adaptive variable-gain rectification.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
2016
A 32.9% PAE, 15.3 dBm, 21.6-41.6 GHz power amplifier in 65nm CMOS using coupled resonators.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Proceedings of the Symposium on VLSI Circuits, 2015
A fully integrated IEEE 802.15.7 visible light communication transmitter with on-chip 8-W 85% efficiency boost LED driver.
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
A 60GHz 4Gb/s fully integrated NRZ-to-QPSK modulator SoC for backhaul links in fiber-wireless networks.
Proceedings of the ESSCIRC Conference 2015, 2015
2014
A 26-28-Gb/s Full-Rate Clock and Data Recovery Circuit With Embedded Equalizer in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Concurrent Design Analysis of High-Linearity SP10T Switch With 8.5 kV ESD Protection.
IEEE J. Solid State Circuits, 2014
A 48-mW 18-Gb/s fully integrated CMOS optical receiver with photodetector and adaptive equalizer.
Proceedings of the Symposium on VLSI Circuits, 2014
17.11 A 0.65ns-response-time 3.01ps FOM fully-integrated low-dropout regulator with full-spectrum power-supply-rejection for wideband communication systems.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Towards indoor localization using Visible Light Communication for consumer electronic devices.
Proceedings of the 2014 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2014
Proceedings of the ESSCIRC 2014, 2014
2013
A ±0.5% Precision On-Chip Frequency Reference With Programmable Switch Array for Crystal-Less Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
A 13.56MHz fully integrated 1X/2X active rectifier with compensated bias current for inductively powered devices.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
A smartphone SP10T T/R switch in 180-nm SOI CMOS with 8kV+ ESD protection by co-design.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
A 65-nm CMOS P-well/Deep N-well avalanche photodetector for integrated 850-nm optical.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013
2012
Wireless power link design using silicon-embedded inductors for brain-machine interface.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
A near-threshold, multi-node, wireless body area sensor network powered by RF energy harvesting.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2009
A 1.1V 150GHz amplifier with 8dB gain and +6dBm saturated output power in standard digital 65nm CMOS using dummy-prefilled microstrip lines.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A 10-Gbps, 8-PAM parallel interface with crosstalk cancellation for future hard disk drive channel ICs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Integrated CMOS transmit-receive switch using LC-tuned substrate bias for 2.4-GHz and 5.2-GHz applications.
IEEE J. Solid State Circuits, 2004
2003
IEEE J. Solid State Circuits, 2003
IEEE J. Solid State Circuits, 2003
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003
Design of a 10GHz clock distribution network using coupled standing-wave oscillators.
Proceedings of the 40th Design Automation Conference, 2003
2002
IEEE J. Solid State Circuits, 2002
1999
Proceedings of the 36th Conference on Design Automation, 1999
1998
IEEE J. Solid State Circuits, 1998
IEEE J. Solid State Circuits, 1998
IEEE J. Solid State Circuits, 1998
1993
Improved universal MOSFET electron mobility degradation models for circuit simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993