Kwang-Ting Cheng

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A 1920×1080 129fps 4.3pJ/pixel Stereo-Matching Processor for Pico Aerial Vehicles.

[BibT_eX]

[DOI]

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

LLM-FP4: 4-Bit Floating-Point Quantized Transformers.

[BibT_eX]

[DOI]

Proceedings of the 2023 Conference on Empirical Methods in Natural Language Processing, 2023

FoodWise: Food Waste Reduction and Behavior Change on Campus with Data Visualization and Gamification.

[BibT_eX]

[DOI]

Proceedings of the 6th ACM SIGCAS/SIGCHI Conference on Computing and Sustainable Societies, 2023

PIM-HLS: An Automatic Hardware Generation Tool for Heterogeneous Processing-In-Memory-based Neural Network Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

AutoDCIM: An Automated Digital CIM Compiler.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

NOLS: A Near-sensor On-chip Learning System with Direct Feedback Alignment for Personalized Wearable Heart Health Monitoring.

[BibT_eX]

[DOI]

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

RVComp: Analog Variation Compensation for RRAM-Based in-Memory Computing.

[BibT_eX]

[DOI]

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

Binary is All You Need: Ultra-Efficient Arrhythmia Detection with a Binary-Only Compressive System.

[BibT_eX]

[DOI]

Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

Semi-Supervised Deep Regression with Uncertainty Consistency and Variational Model Ensembling via Bayesian Neural Networks.

[BibT_eX]

[DOI]

Weihang Dai

Xiaomeng Li

Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023

2022

Adaptive Contrast for Image Regression in Computer-Aided Disease Assessment.

[BibT_eX]

[DOI]

IEEE Trans. Medical Imaging, 2022

Customized Federated Learning for Multi-Source Decentralized Medical Image Classification.

[BibT_eX]

[DOI]

IEEE J. Biomed. Health Informatics, 2022

HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

ReAAP: A Reconfigurable and Algorithm-Oriented Array Processor With Compiler-Architecture Co-Design.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2022

Imitation Learning-Based Algorithm for Drone Cinematography System.

[BibT_eX]

[DOI]

IEEE Trans. Cogn. Dev. Syst., 2022

One-Shot Imitation Drone Filming of Human Motion Videos.

[BibT_eX]

[DOI]

IEEE Trans. Pattern Anal. Mach. Intell., 2022

Randomized Quantization for Data Agnostic Representation Learning.

[BibT_eX]

[DOI]

CoRR, 2022

Analyzing the Hardware-Software Implications of Multi-modal DNN Workloads using MMBench.

[BibT_eX]

[DOI]

CoRR, 2022

Deep Learning for Medical Image Segmentation: Tricks, Challenges and Future Directions.

[BibT_eX]

[DOI]

CoRR, 2022

Sub-cluster-aware Network for Few-shot Skin Disease Classification.

[BibT_eX]

[DOI]

CoRR, 2022

C2FTrans: Coarse-to-Fine Transformers for Medical Image Segmentation.

[BibT_eX]

[DOI]

CoRR, 2022

FedRare: Federated Learning with Intra- and Inter-Client Contrast for Effective Rare Disease Classification.

[BibT_eX]

[DOI]

CoRR, 2022

Label Propagation for Annotation-Efficient Nuclei Segmentation from Pathology Images.

[BibT_eX]

[DOI]

CoRR, 2022

Characterizing and Understanding End-to-End Multi-Modal Neural Networks on GPUs.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2022

Graph Reasoning Transformer for Image Parsing.

[BibT_eX]

[DOI]

Dong Zhang

Jinhui Tang

Proceedings of the MM '22: The 30th ACM International Conference on Multimedia, Lisboa, Portugal, October 10, 2022

InsMix: Towards Realistic Generative Data Augmentation for Nuclei Instance Segmentation.

[BibT_eX]

[DOI]

Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2022, 2022

Dual-Distribution Discrepancy for Anomaly Detection in Chest X-Rays.

[BibT_eX]

[DOI]

Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2022, 2022

SDQ: Stochastic Differentiable Quantization with Mixed Precision.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Machine Learning, 2022

Data-Free Neural Architecture Search via Recursive Label Calibration.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision, 2022

Nonuniform-to-Uniform Quantization: Towards Accurate Quantization via Generalized Straight-Through Estimation.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2022

Vision Transformer Slimming: Multi-Dimension Searching in Continuous Optimization Space.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2022

Stereo Neural Vernier Caliper.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Sixth AAAI Conference on Artificial Intelligence, 2022

2021

Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2021

R2F: A Remote Retraining Framework for AIoT Processors With Computing Errors.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2021

Fast Depth Prediction and Obstacle Avoidance on a Monocular Drone Using Probabilistic Convolutional Neural Network.

[BibT_eX]

[DOI]

IEEE Trans. Intell. Transp. Syst., 2021

Variation-Aware Federated Learning With Multi-Source Decentralized Medical Image Data.

[BibT_eX]

[DOI]

IEEE J. Biomed. Health Informatics, 2021

Joint Multi-Dimension Pruning via Numerical Gradient Update.

[BibT_eX]

[DOI]

IEEE Trans. Image Process., 2021

Echo state graph neural networks with analogue random resistor arrays.

[BibT_eX]

[DOI]

CoRR, 2021

Automated Vision-Based Wellness Analysis for Elderly Care Centers.

[BibT_eX]

[DOI]

CoRR, 2021

Joint stereo 3D object detection and implicit surface reconstruction.

[BibT_eX]

[DOI]

CoRR, 2021

Exploring Feature Representation Learning for Semi-supervised Medical Image Segmentation.

[BibT_eX]

[DOI]

Huimin Wu

Xiaomeng Li

CoRR, 2021

Energy-Efficient Accelerator Design for Deformable Convolution Networks.

[BibT_eX]

[DOI]

CoRR, 2021

Towards Robust Dual-View Transformation via Densifying Sparse Supervision for Mammography Lesion Matching.

[BibT_eX]

[DOI]

Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2021 - 24th International Conference, Strasbourg, France, September 27, 2021

How Do Adam and Training Strategies Help BNNs Optimization.

[BibT_eX]

[DOI]

Proceedings of the 38th International Conference on Machine Learning, 2021

Is Label Smoothing Truly Incompatible with Knowledge Distillation: An Empirical Study.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Learning Representations, 2021

Traffic-Adaptive Power Reconfiguration for Energy-Efficient and Energy-Proportional Optical Interconnects.

[BibT_eX]

[DOI]

Yuyang Wang

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

S2-BNN: Bridging the Gap Between Self-Supervised Real and 1-Bit Neural Networks via Guided Distribution Calibration.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2021

Exploring intermediate representation for monocular vehicle pose estimation.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2021

Partial Is Better Than All: Revisiting Fine-tuning Strategy for Few-shot Learning.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021

2020

Enabling a Single Deep Learning Model for Accurate Gland Instance Segmentation: A Shape-Aware Adversarial Learning Framework.

[BibT_eX]

[DOI]

IEEE Trans. Medical Imaging, 2020

Multi-Task Siamese Network for Retinal Artery/Vein Separation via Deep Convolution Along Vessel.

[BibT_eX]

[DOI]

IEEE Trans. Medical Imaging, 2020

Bi-Modality Medical Image Synthesis Using Semi-Supervised Sequential Generative Adversarial Networks.

[BibT_eX]

[DOI]

IEEE J. Biomed. Health Informatics, 2020

Semi-supervised mp-MRI data synthesis with StitchLayer and auxiliary distance maximization.

[BibT_eX]

[DOI]

Zhiwei Wang

Yi Lin

Medical Image Anal., 2020

Bi-Real Net: Binarizing Deep Network Towards Real-Network Performance.

[BibT_eX]

[DOI]

Int. J. Comput. Vis., 2020

Joint Multi-Dimension Pruning.

[BibT_eX]

[DOI]

CoRR, 2020

Multi-phase and Multi-level Selective Feature Fusion for Automated Pancreas Segmentation from CT Images.

[BibT_eX]

[DOI]

Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2020, 2020

A Hybrid Computing Architecture for Fault-tolerant Deep Learning Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

ReActNet: Towards Precise Binary Neural Network with Generalized Activation Functions.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision - ECCV 2020, 2020

Characterization and Applications of Spatial Variation Models for Silicon Microring-Based Optical Transceivers.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Robust Design of Large Area Flexible Electronics via Compressed Sensing.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Binarizing MobileNet via Evolution-Based Searching.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020

Cascaded Deep Monocular 3D Human Pose Estimation With Evolutionary Training Data.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020

Persistent Fault Analysis of Neural Networks on FPGA-based Acceleration System.

[BibT_eX]

[DOI]

Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020

2019

Real-Time Semantic Plane Reconstruction on a Monocular Drone Using Sparse Fusion.

[BibT_eX]

[DOI]

IEEE Trans. Veh. Technol., 2019

Bayesian DeNet: Monocular Depth Prediction and Frame-Wise Fusion With Synchronized Uncertainty.

[BibT_eX]

[DOI]

IEEE Trans. Multim., 2019

Real-Time Dense Monocular SLAM With Online Adapted Depth Prediction Network.

[BibT_eX]

[DOI]

IEEE Trans. Multim., 2019

A Three-Stage Deep Learning Model for Accurate Retinal Vessel Segmentation.

[BibT_eX]

[DOI]

IEEE J. Biomed. Health Informatics, 2019

Reactive obstacle avoidance of monocular quadrotors with online adapted depth prediction network.

[BibT_eX]

[DOI]

Neurocomputing, 2019

Compact Modeling of Thin-Film Transistors for Flexible Hybrid IoT Design.

[BibT_eX]

[DOI]

Zhenan Bao

IEEE Des. Test, 2019

One-Shot Imitation Filming of Human Motion Videos.

[BibT_eX]

[DOI]

CoRR, 2019

Facial age estimation by deep residual decision making.

[BibT_eX]

[DOI]

CoRR, 2019

A Two-Stage Convolutional Neural Network for Pulmonary Embolism Detection From CTPA Images.

[BibT_eX]

[DOI]

IEEE Access, 2019

Latent Weights Do Not Exist: Rethinking Binarized Neural Network Optimization.

[BibT_eX]

[DOI]

Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019

Automated Pulmonary Embolism Detection from CTPA Images Using an End-to-End Convolutional Neural Network.

[BibT_eX]

[DOI]

Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2019, 2019

Learning to Capture a Film-Look Video with a Camera Drone.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Robotics and Automation, 2019

MetaPruning: Meta Learning for Automatic Neural Network Channel Pruning.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision, 2019

Task Mapping-Assisted Laser Power Scaling for Optical Network-on-Chips.

[BibT_eX]

[DOI]

Yuyang Wang

Proceedings of the International Conference on Computer-Aided Design, 2019

Process Design Kit and Design Automation for Flexible Hybrid Electronics.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Evaluating Assertion Set Completeness to Expose Hardware Trojans and Verification Blindspots.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Ultra-thin Skin Electronics for High Quality and Continuous Skin-Sensor-Silicon Interfacing.

[BibT_eX]

[DOI]

Zhenan Bao

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Visualizing the Decision-making Process in Deep Neural Decision Forest.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2019

Learning to Film From Professional Human Motion Videos.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2019

Bidirectional tuning of microring-based silicon photonic transceivers for optimal energy efficiency.

[BibT_eX]

[DOI]

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018

A Skeletal Similarity Metric for Quality Evaluation of Retinal Vessel Segmentation.

[BibT_eX]

[DOI]

IEEE Trans. Medical Imaging, 2018

Automated Detection of Clinically Significant Prostate Cancer in mp-MRI Images Based on an End-to-End Deep Neural Network.

[BibT_eX]

[DOI]

IEEE Trans. Medical Imaging, 2018

Joint Segment-Level and Pixel-Wise Losses for Deep Learning Based Retinal Vessel Segmentation.

[BibT_eX]

[DOI]

IEEE Trans. Biomed. Eng., 2018

Robust and real-time pose tracking for augmented reality on mobile devices.

[BibT_eX]

[DOI]

Jiabin Guo

Tangli Xue

Multim. Tools Appl., 2018

Deep Hierarchical Machine: a Flexible Divide-and-Conquer Architecture.

[BibT_eX]

[DOI]

CoRR, 2018

Monocular Camera Based Real-Time Dense Mapping Using Generative Adversarial Network.

[BibT_eX]

[DOI]

Proceedings of the 2018 ACM Multimedia Conference on Multimedia Conference, 2018

A Deep Model with Shape-Preserving Loss for Gland Instance Segmentation.

[BibT_eX]

[DOI]

Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2018, 2018

Pre-silicon Formal Verification of JTAG Instruction Opcodes for Security.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2018

Through-the-Lens Drone Filming.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2018

ACT: An Autonomous Drone Cinematography System for Action Scenes.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Conference on Robotics and Automation, 2018

Bi-Real Net: Enhancing the Performance of 1-Bit CNNs with Improved Representational Capability and Advanced Training Algorithm.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision - ECCV 2018, 2018

Energy-efficient channel alignment of DWDM silicon photonic transceivers.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Compact modeling of carbon nanotube thin film transistors for flexible circuit design.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

StitchAD-GAN for Synthesizing Apparent Diffusion Coefficient Images of Clinically Significant Prostate Cancer.

[BibT_eX]

[DOI]

Proceedings of the British Machine Vision Conference 2018, 2018

Pairing of microring-based silicon photonic transceivers for tuning power optimization.

[BibT_eX]

[DOI]

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

Process design kit for flexible hybrid electronics.

[BibT_eX]

[DOI]

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017

Hiding Hardware Trojan Communication Channels in Partially Specified SoC Bus Functionality.

[BibT_eX]

[DOI]

Ismail San

Çetin Kaya Koç

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Co-trained convolutional neural networks for automated detection of prostate cancer in multi-parametric MRI.

[BibT_eX]

[DOI]

Marco Antonio Ramírez Salinas

Medical Image Anal., 2017

An Automatic Functional Coverage for Digital Systems Through a Binary Particle Swarm Optimization Algorithm with a Reinitialization Mechanism.

[BibT_eX]

[DOI]

Alfonso Martínez-Cruz

Ricardo Barrón Fernández

Herón Molina-Lozano

Luis Alfonso Villa Vargas

Prometeo Cortés-Antonio

J. Electron. Test., 2017

Local Feature Descriptor Learning with Adaptive Siamese Network.

[BibT_eX]

[DOI]

CoRR, 2017

Joint Detection and Diagnosis of Prostate Cancer in Multi-parametric MRI Based on Multimodal Convolutional Neural Networks.

[BibT_eX]

[DOI]

Liang Wang

Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2017, 2017

Robust design and design automation for flexible hybrid electronics.

[BibT_eX]

[DOI]

Leilai Shao

Ting Lei

Zhenan Bao

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

REDBEE: A visual-inertial drone system for real-time moving object detection.

[BibT_eX]

[DOI]

Chong Huang

Peng Chen

Proceedings of the 2017 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2017

Mining mutation testing simulation traces for security and testbench debugging.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Compact modeling and circuit-level simulation of silicon nanophotonic interconnects.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

3D-DPE: A 3D high-bandwidth dot-product engine for high-performance neuromorphic computing.

[BibT_eX]

[DOI]

Bhaswar Chakrabarti

Dmitri B. Strukov

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

An artificial neural network approach for screening test escapes.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

DLPS: Dynamic laser power scaling for optical Network-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

Detecting hardware Trojans in unspecified functionality through solving satisfiability problems.

[BibT_eX]

[DOI]

Ismail San

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

ASP-DAC 2017 keynote speech I-1: Heterogeneous integration of X-tronics: Design automation and education.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

An Efficient Network-on-Chip Yield Estimation Approach Based on Gibbs Sampling.

[BibT_eX]

[DOI]

Fan Lan

Yun Pan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Renal compartment segmentation in DCE-MRI images.

[BibT_eX]

[DOI]

Hung Le Minh

Kyung Hyun Sung

Wenyu Liu

Medical Image Anal., 2016

Associative Memristive Memory for Approximate Computing in GPUs.

[BibT_eX]

[DOI]

Abbas Rahimi

Luca Benini

Rajesh K. Gupta

IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Accurate and efficient pulse measurement from facial videos on smartphones.

[BibT_eX]

[DOI]

Chong Huang

Proceedings of the 2016 IEEE Winter Conference on Applications of Computer Vision, 2016

Printed circuits on flexible substrates: opportunities and challenges (invited paper).

[BibT_eX]

[DOI]

Proceedings of the Tenth IEEE/ACM International Symposium on Networks-on-Chip, 2016

OGB: A Distinctive and Efficient Feature for Mobile Augmented Reality.

[BibT_eX]

[DOI]

Xinggang Wang

Proceedings of the MultiMedia Modeling - 22nd International Conference, 2016

Variation and failure characterization through pattern classification of test data from multiple test stages.

[BibT_eX]

[DOI]

Friedrich Peter Leisenberger

Peter Sarson

Gregor Schatzberger

John M. Carulli Jr.

Siddhartha Siddhartha

Proceedings of the 2016 IEEE International Test Conference, 2016

In-place Repair for Resistive Memories Utilizing Complementary Resistive Switches.

[BibT_eX]

[DOI]

Yuyang Wang

Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Process-variation tolerant flexible circuit for wearable electronics.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A low-power hybrid reconfigurable architecture for resistive random-access memories.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

Trojans modifying soft-processor instruction sequences embedded in FPGA bitstreams.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

A wearable signal acquisition system for physiological signs including throat PPG.

[BibT_eX]

[DOI]

Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

Hardware Trojans in incompletely specified on-chip bus systems.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

A Low-Power Variation-Aware Adaptive Write Scheme for Access-Transistor-Free Memristive Memory.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2015

Design, Automation, and Test for Low-Power and Reliable Flexible Electronics.

[BibT_eX]

[DOI]

Tsung-Ching Jim Huang

Found. Trends Electron. Des. Autom., 2015

Compact modeling and system implications of microring modulators in nanophotonic interconnects.

[BibT_eX]

[DOI]

Proceedings of the 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction, 2015

Leveraging nonvolatility for architecture design with emerging NVM.

[BibT_eX]

[DOI]

Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

Architecting energy efficient crossbar-based memristive random-access memories.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

DWDM nanophotonic interconnects: toward terabit/s chip-scale serial link.

[BibT_eX]

[DOI]

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

Vision-Inertial Hybrid Tracking for Robust and Efficient Augmented Reality on Smartphones.

[BibT_eX]

[DOI]

Proceedings of the 23rd Annual ACM Conference on Multimedia Conference, MM '15, Brisbane, Australia, October 26, 2015

Automatic Segmentation of Renal Compartments in DCE-MRI Images.

[BibT_eX]

[DOI]

Hung Le Minh

Kyung Hyun Sung

Wenyu Liu

Proceedings of the Medical Image Computing and Computer-Assisted Intervention - MICCAI 2015, 2015

AdaTest: An efficient statistical test framework for test escape screening.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Test Conference, 2015

Hardware Trojans hidden in RTL don't cares - Automated insertion and prevention methodologies.

[BibT_eX]

[DOI]

Shrikant Kulkarni

Proceedings of the 2015 IEEE International Test Conference, 2015

Fusion of Vision and Inertial Sensing for Accurate and Efficient Pose Tracking on Smartphones.

[BibT_eX]

[DOI]

Xun Si

Tangli Xue

Proceedings of the 2015 IEEE International Symposium on Mixed and Augmented Reality, 2015

A configurable CMOS memory platform for 3D-integrated memristors.

[BibT_eX]

[DOI]

Melika Payvand

Advait Madhavan

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Variation-Aware Adaptive Tuning for Nanophotonic Interconnects.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Pairwise Proximity-Based Features for Test Escape Screening.

[BibT_eX]

[DOI]

Alberto Giovanni Busetto

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Detecting Hardware Trojans in Unspecified Functionality Using Mutation Testing.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Standard 12-lead ECG synthesis using a GA optimized BP neural network.

[BibT_eX]

[DOI]

Proceedings of the Seventh International Conference on Advanced Computational Intelligence, 2015

Approximate associative memristive memory for energy-efficient GPUs.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

HReRAM: a hybrid reconfigurable resistive random-access memory.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Hardware Trojan detection using exhaustive testing of k-bit subspaces.

[BibT_eX]

[DOI]

Nicole Lesperance

Shrikant Kulkarni

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Toward large-scale access-transistor-free memristive crossbars.

[BibT_eX]

[DOI]

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Mobile Image Search: Challenges and Methods.

[BibT_eX]

[DOI]

Proceedings of the Mobile Cloud Visual Media Computing - From Interaction to Service, 2015

2014

Test-Quality Optimization for Variable $n$ -Detections of Transition Faults.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2014

Compact Test Generation With an Influence Input Measure for Launch-On-Capture Transition Fault Testing.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2014

Learning Optimized Local Difference Binaries for Scalable Augmented Reality on Mobile Devices.

[BibT_eX]

[DOI]

IEEE Trans. Vis. Comput. Graph., 2014

Local Difference Binary for Ultrafast and Distinctive Feature Description.

[BibT_eX]

[DOI]

IEEE Trans. Pattern Anal. Mach. Intell., 2014

libLDB: a library for extracting ultrafast and distinctive binary feature description.

[BibT_eX]

[DOI]

Chong Huang

Proceedings of the ACM International Conference on Multimedia, MM '14, Orlando, FL, USA, November 03, 2014

Feature engineering with canonical analysis for effective statistical tests screening test escapes.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Test Conference, 2014

Geodesic Active Contours with Adaptive Configuration for Cerebral Vessel and Aneurysm Segmentation.

[BibT_eX]

[DOI]

Aichi Chien

Proceedings of the 22nd International Conference on Pattern Recognition, 2014

Joint Virtual Probe: Joint exploration of multiple test items' spatial patterns for efficient silicon characterization and test prediction.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Energy-Efficient GPGPU Architectures via Collaborative Compilation and Memristive Memory-Based Computing.

[BibT_eX]

[DOI]

Abbas Rahimi

Luca Benini

Rajesh K. Gupta

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Learning from Production Test Data: Correlation Exploration and Feature Engineering.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE Asian Test Symposium, 2014

Accurate Vessel Segmentation with Progressive Contrast Enhancement and Canny Refinement.

[BibT_eX]

[DOI]

Aichi Chien

Proceedings of the Computer Vision - ACCV 2014, 2014

2013

Low-Cost Error Tolerance Scheme for 3-D CMOS Imagers.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2013

Digital-to-analog and analog-to-digital conversion with metal oxide memristors for ultra-low power computing.

[BibT_eX]

[DOI]

Ligang Gao

Farnood Merrikh-Bayat

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2013

Test data analytics - Exploring spatial and test-item correlations in production test data.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Test Conference, 2013

Towards data reliable crossbar-based memristive memories.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Test Conference, 2013

Mutation analysis with coverage discounting.

[BibT_eX]

[DOI]

Nicole Lesperance

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Power-Efficient Calibration and Reconfiguration for Optical Network-on-Chip.

[BibT_eX]

[DOI]

JOCN, 2012

Comprehensive online defect diagnosis in on-chip networks.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE VLSI Test Symposium, 2012

Energy and Performance Characterization of Mobile Heterogeneous Computing.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Accelerating SURF detector on mobile devices.

[BibT_eX]

[DOI]

Proceedings of the 20th ACM Multimedia Conference, MM '12, Nara, Japan, October 29, 2012

Adaptive test selection for post-silicon timing validation: A data mining approach.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Test Conference, 2012

3D CMOS-memristor hybrid circuits: devices, integration, architecture, and applications.

[BibT_eX]

[DOI]

Dmitri B. Strukov

Proceedings of the International Symposium on Physical Design, 2012

LDB: An ultra-fast feature for scalable Augmented Reality on mobile devices.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International Symposium on Mixed and Augmented Reality, 2012

Power-efficient calibration and reconfiguration for on-chip optical communication.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Post-fabrication reconfiguration for power-optimized tuning of optically connected multi-core systems.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

Improving validation coverage metrics to account for limited observability.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

On error modeling of electrical bugs for post-silicon timing validation.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

Platform characterization for Domain-Specific Computing.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Fast Visual Retrieval Using Accelerated Sequence Matching.

[BibT_eX]

[DOI]

IEEE Trans. Multim., 2011

Tester-Assisted Calibration and Screening for Digitally-Calibrated ADCs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Modeling Yield, Cost, and Quality of a Spare-Enhanced Multicore Chip.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2011

Time-Multiplexed Online Checking.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2011

Robust Circuit Design for Flexible Electronics.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2011

A Promising Alternative to Conventional Silicon.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2011

Minimum correspondence sets for improving large-scale augmented paper.

[BibT_eX]

[DOI]

Proceedings of the 10th International Conference on Virtual Reality Continuum and its Applications in Industry, 2011

Large-scale EMM identification based on geometry-constrained visual word correspondence voting.

[BibT_eX]

[DOI]

Proceedings of the 1st International Conference on Multimedia Retrieval, 2011

End-to-end error correction and online diagnosis for on-chip networks.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2011

Test cost reduction through performance prediction using virtual probe.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2011

Coverage discounting: A generalized approach for testbench qualification.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International High Level Design Validation and Test Workshop, 2011

An all-digital built-in self-test technique for transfer function characterization of RF PLLs.

[BibT_eX]

[DOI]

Ping-Ying Wang

Proceedings of the Design, Automation and Test in Europe, 2011

Image quality aware metrics for performance specification of ADC array in 3D CMOS imagers.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

Energy-optimized mapping of application to smartphone platform - A case study of mobile face recognition.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2011

Post-silicon bug detection for variation induced electrical bugs.

[BibT_eX]

[DOI]

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

Efficient Test Methodologies for High-Speed Serial Links

[BibT_eX]

[DOI]

Lecture Notes in Electrical Engineering 51, Springer, ISBN: 978-90-481-3442-7, 2010

Recent Advances in Analog, Mixed-Signal, and RF Testing.

[BibT_eX]

[DOI]

Hsiu-Ming (Sherman) Chang

IPSJ Trans. Syst. LSI Des. Methodol., 2010

Calibration and Test Time Reduction Techniques for Digitally-Calibrated Designs: an ADC Case Study.

[BibT_eX]

[DOI]

J. Electron. Test., 2010

Modeling yield, cost, and quality of an NoC with uniformly and non-uniformly distributed redundancy.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE VLSI Test Symposium, 2010

Design, analysis, and test of low-power and reliable flexible electronics.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE VLSI Test Symposium, 2010

Innovative practices session 2C: Design, fabrication and test of flexible electronics.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE VLSI Test Symposium, 2010

Calibration-assisted production testing for digitally-calibrated ADCs.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE VLSI Test Symposium, 2010

A GPU-accelerated face annotation system for smartphones.

[BibT_eX]

[DOI]

Sydney Pang

Proceedings of the 18th International Conference on Multimedia 2010, 2010

Error-locality-aware linear coding to correct multi-bit upsets in SRAMs.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2010

nGFSIM : A GPU-based fault simulator for 1-to-n detection and its applications.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2010

Mutation-based diagnostic test generation for hardware design error diagnosis.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2010

A case study of Time-Multiplexed Assertion Checking for post-silicon debugging.

[BibT_eX]

[DOI]

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

Energy-Aware Real-Time Face Recognition System on Mobile CPU-GPU Platform.

[BibT_eX]

[DOI]

Bryan Donyanavard

Proceedings of the Trends and Topics in Computer Vision, 2010

A portable multi-pitch e-drum based on printed flexible pressure sensors.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

Pseudo-CMOS: A novel design style for flexible electronics.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

An automatic test generation framework for digitally-assisted adaptive equalizers in high-speed serial links.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

SCEMIT: a systemc error and mutation injection tool.

[BibT_eX]

[DOI]

Proceedings of the 47th Design Automation Conference, 2010

An error tolerance scheme for 3D CMOS imagers.

[BibT_eX]

[DOI]

Ding-Ming Kwai

Cheng-Wen Wu

Proceedings of the 47th Design Automation Conference, 2010

Mobile image search with multimodal context-aware queries.

[BibT_eX]

[DOI]

Sydney Pang

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2010

2009

SEChecker: A Sequential Equivalence Checking Framework Based on Kth Invariants.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2009

Dynamic Test Compaction for Transition Faults in Broadside Scan Testing Based on an Influence Cone Measure.

[BibT_eX]

[DOI]

Dong Xiang

Boxue Yin

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Yield and Cost Analysis of a Reliable NoC.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Calibration and Testing Time Reduction Techniques for a Digitally-Calibrated Pipelined ADC.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

A compact, effective descriptor for video copy detection.

[BibT_eX]

[DOI]

Proceedings of the 17th International Conference on Multimedia 2009, 2009

Near-duplicate detection for images and videos.

[BibT_eX]

[DOI]

Proceedings of the First ACM workshop on Large-scale multimedia retrieval and mining, 2009

MyFinder: near-duplicate detection for large image collections.

[BibT_eX]

[DOI]

Proceedings of the 17th International Conference on Multimedia 2009, 2009

A Built-in self-calibration scheme for pipelined ADCs.

[BibT_eX]

[DOI]

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

An instrumented observability coverage method for system validation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2009

Signature-Based Testing for Digitally-Assisted Adaptive Equalizers in High-Speed Serial Links.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE European Test Symposium, 2009

Video copy detection by fast sequence matching.

[BibT_eX]

[DOI]

Proceedings of the 8th ACM International Conference on Image and Video Retrieval, 2009

Test strategies for adaptive equalizers.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

Low Overhead Time-Multiplexed Online Checking: A Case Study of An H.264 Decoder.

[BibT_eX]

[DOI]

Proceedings of the Eighteentgh Asian Test Symposium, 2009

Calibration as a Functional Test: An ADC Case Study.

[BibT_eX]

[DOI]

Proceedings of the Eighteentgh Asian Test Symposium, 2009

2008

Logic Testing.

[BibT_eX]

[DOI]

Laung-Terng Wang

Charles E. Stroud

Proceedings of the Wiley Encyclopedia of Computer Science and Engineering, 2008

A Clock-Less Jitter Spectral Analysis Technique.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Reliability analysis for flexible electronics: Case study of integrated a-Si: H TFT scan driver.

[BibT_eX]

[DOI]

Huai-Yuan Tseng

Chen-Pang Kung

ACM J. Emerg. Technol. Comput. Syst., 2008

Design and test for reliability and efficiency.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2008

Not just research as usual.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2008

Effective silicon debug is key for time to money.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2008

Test compression saves bits, cycles, and money.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2008

From the EIC.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2008

Bit-Error Rate Estimation for Bang-Bang Clock and Data Recovery Circuit in High-Speed Serial Links.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

A real-time, embedded face-annotation system.

[BibT_eX]

[DOI]

Shih-Wei Chu

Proceedings of the 16th International Conference on Multimedia 2008, 2008

A string matching approach for visual retrieval and classification.

[BibT_eX]

[DOI]

Proceedings of the 1st ACM SIGMM International Conference on Multimedia Information Retrieval, 2008

A Cost Analysis Framework for Multi-core Systems with Spares.

[BibT_eX]

[DOI]

Sung-Jui (Song-Ra) Pan

Proceedings of the 2008 IEEE International Test Conference, 2008

RTL Error Diagnosis Using a Word-Level SAT-Solver.

[BibT_eX]

[DOI]

Saeed Mirzaeian

Feijun (Frank) Zheng

Proceedings of the 2008 IEEE International Test Conference, 2008

Time-Multiplexed Online Checking: A Feasibility Study.

[BibT_eX]

[DOI]

Hsiu-Ming (Sherman) Chang

Hsiu-Ming (Sherman) Chang

Proceedings of the 17th IEEE Asian Test Symposium, 2008

Digitally-Assisted Analog/RF Testing for Mixed-Signal SoCs.

[BibT_eX]

[DOI]

Min-Sheng (Mitchell) Lin

Proceedings of the 17th IEEE Asian Test Symposium, 2008

Accurate Bit-Error-Rate estimation for efficient high speed I/O testing.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

Silicon Debug for Timing Errors.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Multiple-Fault Diagnosis Based On Adaptive Diagnostic Test Pattern Generation.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Trustworthy ICs for secure embedded computing.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2007

Combining synchronous and asynchronous timing schemes for high-performance systems.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2007

Design and CAD for Nanotechnologies.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2007

Supporting cost-effective innovation.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2007

Cocktail approach to functional verification.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2007

Moore's law meets the life sciences.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2007

Diagnosing scan chains using SAT-based diagnostic pattern generation.

[BibT_eX]

[DOI]

Jin-Fu Li

Feijun (Frank) Zheng

Proceedings of the 2007 IEEE International SOC Conference, 2007

A hybrid scheme for compacting test responses with unknown values.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

A framework for system reliability analysis considering both system error tolerance and component test quality.

[BibT_eX]

[DOI]

Sung-Jui (Song-Ra) Pan

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Testable design for advanced serial-link transceivers.

[BibT_eX]

[DOI]

Mitchell Lin

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

A two-tone test method for continuous-time adaptive equalizers.

[BibT_eX]

[DOI]

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

An Efficient Diagnostic Test Pattern Generation Framework Using Boolean Satisfiability.

[BibT_eX]

[DOI]

Proceedings of the 16th Asian Test Symposium, 2007

An Accurate Jitter Estimation Technique for Efficient High Speed I/O Testing.

[BibT_eX]

[DOI]

Proceedings of the 16th Asian Test Symposium, 2007

2006

Bit-Error-Rate Estimation for High-Speed Serial Links.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Pseudofunctional testing.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Simulation-Based Functional Test Generation for Embedded Processors.

[BibT_eX]

[DOI]

Charles H.-P. Wen

IEEE Trans. Computers, 2006

Guest Editorial.

[BibT_eX]

[DOI]

Salvador Mir

Andrew Richardson

J. Electron. Test., 2006

Test Consideration for Nanometer-Scale CMOS Circuits.

[BibT_eX]

[DOI]

Kaushik Roy

T. M. Mak

IEEE Des. Test Comput., 2006

Handling variations and uncertainties.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2006

The New World of ESL Design.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2006

Vision from the Top.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2006

The Need for a SiP Design and Test Infrastructure.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2006

Dealing with early life failures.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2006

New beginnings, continued success.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2006

Multimodal fusion using learned text concepts for image categorization.

[BibT_eX]

[DOI]

Proceedings of the 14th ACM International Conference on Multimedia, 2006

Testable Design for Adaptive Linear Equalizer in High-Speed Serial Links.

[BibT_eX]

[DOI]

Mitchell Lin

Proceedings of the 2006 IEEE International Test Conference, 2006

A Unified Approach to Test Generation and Test Data Volume Reduction.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Test Conference, 2006

Bit Error Rate Estimation for Improving Jitter Testing of High-Speed Serial Links.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Test Conference, 2006

IChecker: An Efficient Checker for Inductive Invariants.

[BibT_eX]

[DOI]

Proceedings of the Eleventh Annual IEEE International High-Level Design Validation and Test Workshop 2006, 2006

Timing-reasoning-based delay fault diagnosis.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Multiple-fault diagnosis based on single-fault activation and single-output observation.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Coverage loss by using space compactors in presence of unknown values.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Unknown-tolerance analysis and test-quality control for test response compaction using space compactors.

[BibT_eX]

[DOI]

Proceedings of the 43rd Design Automation Conference, 2006

Fast Human Detection Using a Cascade of Histograms of Oriented Gradients.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR 2006), 2006

Efficient identification of multi-cycle false path.

[BibT_eX]

[DOI]

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

Generation of shorter sequences for high resolution error diagnosis using sequential SAT.

[BibT_eX]

[DOI]

Sung-Jui (Song-Ra) Pan

John Moondanos

Ziyad Hanna

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

Embedded Software-Based Self-Testing for SoC Design.

[BibT_eX]

[DOI]

Proceedings of the Embedded Systems Handbook., 2005

Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2005

On A Software-Based Self-Test Methodology and Its Application.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005

Pseudo-Functional Scan-based BIST for Delay Fault.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005

Simulation-based target test generation techniques for improving the robustness of a software-based-self-test methodology.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Production-oriented interface testing for PCI-Express by enhanced loop-back technique.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Using visual features for anti-spam filtering.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Image Processing, 2005

Learning a Sparse, Corner-Based Representation for Time-varying Background Modeling.

[BibT_eX]

[DOI]

Shai Avidan

Proceedings of the 10th IEEE International Conference on Computer Vision (ICCV 2005), 2005

Accurate Diagnosis of Multiple Faults.

[BibT_eX]

[DOI]

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

ChiYun Compact: A Novel Test Compaction Technique for Responses with Unknown Values.

[BibT_eX]

[DOI]

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

RTL SAT simplification by Boolean and interval arithmetic reasoning.

[BibT_eX]

[DOI]

Forrest Brewer

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Response shaper: a novel technique to enhance unknown tolerance for output response compaction.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Sequential equivalence checking based on k-th invariants and circuit SAT solving.

[BibT_eX]

[DOI]

Proceedings of the Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30, 2005

An Efficient Sequential SAT Solver With Improved Search Strategies.

[BibT_eX]

[DOI]

Proceedings of the 2005 Design, 2005

Efficient Conflict-Based Learning in an RTL Circuit Constraint Solver.

[BibT_eX]

[DOI]

Proceedings of the 2005 Design, 2005

Structural search for RTL with predicate learning.

[BibT_eX]

[DOI]

Forrest Brewer

Proceedings of the 42nd Design Automation Conference, 2005

Constraint extraction for pseudo-functional scan-based delay testing.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

A new sigma-delta modulator architecture for testing using digital stimulus.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2004

Critical path selection for delay fault testing based upon a statistical timing model.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Self-referential verification for gate-level implementations of arithmetic circuits.

[BibT_eX]

[DOI]

Ying-Tsai Chang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

A Signal Correlation Guided Circuit-SAT Solver.

[BibT_eX]

[DOI]

John Moondanos

Ziyad Hanna

J. Univers. Comput. Sci., 2004

Safety Property Verification Using Sequential SAT and Bounded Model Checking.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2004

New Challenges in Delay Testing of Nanometer, Multigigahertz Designs.

[BibT_eX]

[DOI]

T. M. Mak

IEEE Des. Test Comput., 2004

A Scalable On-Chip Jitter Extraction Technique.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

An adaptive skin model and its application to objectionable image filtering.

[BibT_eX]

[DOI]

Proceedings of the 12th ACM International Conference on Multimedia, 2004

BER Estimation for Serial Links Based on Jitter Spectrum and Clock Recovery Characteristics.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

SSD tracking using dynamic template and log-polar transformation.

[BibT_eX]

HongJiang Zhang

Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004

A unified adaptive approach to accurate skin detection.

[BibT_eX]

[DOI]

Ching-Tung Wu

Proceedings of the 2004 International Conference on Image Processing, 2004

Static statistical timing analysis for latch-based pipeline designs.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

A path-based methodology for post-silicon timing validation.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

On using a 2-domain partitioned OBDD data structure in verification.

[BibT_eX]

[DOI]

Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004

Adaptive Learning of an Accurate Skin-Color Model.

[BibT_eX]

[DOI]

Proceedings of the Sixth IEEE International Conference on Automatic Face and Gesture Recognition (FGR 2004), 2004

Random Jitter Extraction Technique in a Multi-Gigahertz Signal.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

Pattern Selection for Testing of Deep Sub-Micron Timing Defects.

[BibT_eX]

[DOI]

Mango Chia-Tso Chao

Proceedings of the 2004 Design, 2004

Improved Symoblic Simulation by Dynamic Funtional Space Partitioning.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

On path-based learning and its applications in delay test and diagnosis.

[BibT_eX]

[DOI]

Proceedings of the 41th Design Automation Conference, 2004

An efficient finite-domain constraint solver for circuits.

[BibT_eX]

[DOI]

Proceedings of the 41th Design Automation Conference, 2004

A Signa-Delta Modulation Based Analog BIST System with a Wide Bandwidth Fifth-Order Analog Response Extractor for Diagnosis Purpose.

[BibT_eX]

[DOI]

Hao-Chiao Hong

Cheng-Wen Wu

Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004

TranGen: a SAT-based ATPG for path-oriented transition faults.

[BibT_eX]

[DOI]

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

Efficient reachability checking using sequential SAT.

[BibT_eX]

[DOI]

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

Jitter spectral extraction for multi-gigahertz signal.

[BibT_eX]

[DOI]

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

Improved symbolic simulation by functional-space decomposition.

[BibT_eX]

[DOI]

Tao Feng

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

Practical considerations in applying Σ-Δ modulation-based analog BIST to sampled-data systems.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2003

Modeling, testing, and analysis for delay defects and noise effects in deep submicron devices.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Critical Path Selection for Deep Sub-Micron Delay Test and Timing Validation.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

Guest Editors' Introduction: Speed Test and Speed Binning for Complex ICs.

[BibT_eX]

[DOI]

Kenneth M. Butler

IEEE Des. Test Comput., 2003

Enhanced Symbolic Simulation for Functional Verification of Embedded Array Systems.

[BibT_eX]

[DOI]

Tao Feng

Magdy S. Abadir

Manish Pandey

Des. Autom. Embed. Syst., 2003

Embedded Tutorial: Test Consideration for Nanometer Scale CMOS Circuits.

[BibT_eX]

[DOI]

Kaushik Roy

T. M. Mak

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Diagnosis of Delay Defects Using Statistical Timing Models.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

The Confluence of Manufacturing Test and Design Validation.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

On Structural vs. Functional Testing for Delay Faults.

[BibT_eX]

[DOI]

Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

SATORI - A Fast Sequential SAT Engine for Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

A comparison of BDDs, BMC, and sequential SAT for model checking.

[BibT_eX]

[DOI]

Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003

A Circuit SAT Solver With Signal Correlation Guided Learning.

[BibT_eX]

[DOI]

Proceedings of the 2003 Design, 2003

Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step.

[BibT_eX]

[DOI]

Proceedings of the 2003 Design, 2003

A signal correlation guided ATPG solver and its applications for solving difficult industrial cases.

[BibT_eX]

[DOI]

Proceedings of the 40th Design Automation Conference, 2003

Enhancing diagnosis resolution for delay defects based upon statistical timing and statistical fault models.

[BibT_eX]

[DOI]

Proceedings of the 40th Design Automation Conference, 2003

Delta-sigma modulator based mixed-signal BIST architecture for SoC.

[BibT_eX]

[DOI]

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

Experience in critical path selection for deep sub-micron delay test and timing validation.

[BibT_eX]

[DOI]

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

Enhanced symbolic simulation for efficient verification of embedded array systems.

[BibT_eX]

[DOI]

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

An Anatomy of a Large-Scale Image Search Engine.

[BibT_eX]

[DOI]

Proceedings of the Web Document Analysis, 2003

2002

Embedded Software-Based Self-Test for Programmable Core-Based Designs.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2002

Self-Testing Second-Order Delta-Sigma Modulators Using Digital Stimulus.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

MORF: A Distributed Multimodal Information Filtering System.

[BibT_eX]

[DOI]

Proceedings of the Advances in Multimedia Information Processing, 2002

Hybrid Learning Schemes for Multimedia Information Retrieval.

[BibT_eX]

[DOI]

Proceedings of the Advances in Multimedia Information Processing, 2002

PBIR-MM: multimodal image retrieval and annotation.

[BibT_eX]

[DOI]

Proceedings of the 10th ACM International Conference on Multimedia 2002, 2002

Combining ATPG and Symbolic Simulation for Efficient Validation of Embedded Array Systems.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Analysis of Delay Test Effectiveness with a Multiple-Clock Scheme.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

On theoretical and practical considerations of path selection for delay fault testing.

[BibT_eX]

[DOI]

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Enhancing test efficiency for delay fault testing using multiple-clocked schemes.

[BibT_eX]

[DOI]

Proceedings of the 39th Design Automation Conference, 2002

False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation.

[BibT_eX]

[DOI]

Proceedings of the 39th Design Automation Conference, 2002

Embedded software-based self-testing for SoC design.

[BibT_eX]

[DOI]

Proceedings of the 39th Design Automation Conference, 2002

On-chip Analog Response Extraction with 1-Bit ? - Modulators.

[BibT_eX]

[DOI]

Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002

2001

Vector generation for power supply noise estimation and verification of deep submicron designs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2001

Verifying sequential equivalence using ATPG techniques.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2001

Pattern generation for delay testing and dynamic timing analysisconsidering power-supply noise effects.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Using word-level ATPG and modular arithmetic constraint-solvingtechniques for assertion property checking.

[BibT_eX]

[DOI]

Alberto L. Sangiovanni-Vincentelli

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Limitations and challenges of computer-aided design technology for CMOS VLSI.

[BibT_eX]

[DOI]

Proc. IEEE, 2001

Embedded-Software-Based Approach to Testing Crosstalk-Induced Faults at On-Chip Buses.

[BibT_eX]

[DOI]

Jing-Reng Huang

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

A Self-Test Methodology for IP Cores in Bus-Based Programmable SoCs.

[BibT_eX]

[DOI]

Jing-Reng Huang

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

An On-Chip Short-Time Interval Measurement Technique for Testing High-Speed Communication Links.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

PBIR - Perception-Based Image Retrieval.

[BibT_eX]

[DOI]

Lihyuarn L. Chang

Proceedings of the 2001 ACM SIGMOD international conference on Management of data, 2001

Support vector machine pairwise classifiers with error reduction for image classification.

[BibT_eX]

[DOI]

Kingshy Goh

Proceedings of the 2001 ACM workshops on Multimedia: multimedia information retrieval, Ottawa, ON, Canada, September 30, 2001

PBIR: perception-based image retrieval-a system that can quickly capture subjective image query concepts.

[BibT_eX]

[DOI]

Proceedings of the 9th ACM International Conference on Multimedia 2001, Ottawa, Ontario, Canada, September 30, 2001

Delay testing considering crosstalk-induced effects.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

HRM - A Hierarchical Simulator for Full-Chip Power Network Reliability Analysis.

[BibT_eX]

[DOI]

Han Young Koh

Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

Mining Image Features for Efficient Query Processing.

[BibT_eX]

[DOI]

Proceedings of the 2001 IEEE International Conference on Data Mining, 29 November, 2001

Induction-Based Gate-Level Verification of Multipliers.

[BibT_eX]

[DOI]

Ying-Tsai Chang

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

An analysis of ATPG and SAT algorithms for formal verification.

[BibT_eX]

[DOI]

Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop 2001, 2001

Fast Statistical Timing Analysis By Probabilistic Event Propagation.

[BibT_eX]

[DOI]

Proceedings of the 38th Design Automation Conference, 2001

Instruction-Level DFT for Testing Processor and IP Cores in System-on-a-Chip.

[BibT_eX]

[DOI]

Proceedings of the 38th Design Automation Conference, 2001

SVM Binary Classifier Ensembles for Image Classification.

[BibT_eX]

[DOI]

Kingshy Goh

Proceedings of the 2001 ACM CIKM International Conference on Information and Knowledge Management, 2001

2000

Estimation for maximum instantaneous current through supply lines for CMOS circuits.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2000

On improving test quality of scan-based BIST.

[BibT_eX]

[DOI]

Sudipta Bhawmik

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

AQUILA: An Equivalence Checking System for Large Sequential Designs.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2000

Testable Path Delay Fault Cover for Sequential Circuits.

[BibT_eX]

[DOI]

J. Inf. Sci. Eng., 2000

Functionally Testable Path Delay Faults on a Microprocessor.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2000

Characterization of a Pseudo-Random Testing Technique for Analog and Mixed-Signal Built-in-Self-Test.

[BibT_eX]

[DOI]

Jan Arild Tofte

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Path Selection for Delay Testing of Deep Sub-Micron Devices Using Statistical Performance Sensitivity Analysis.

[BibT_eX]

[DOI]

Deb Aditya Mukherjee

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

On Testing the Path Delay Faults of a Microprocessor Using its Instruction Set.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Efficient test mode selection and insertion for RTL-BIST.

[BibT_eX]

[DOI]

Subrata Roy

Gokhan Guner

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Test program synthesis for path delay faults in microprocessor cores.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Static property checking using ATPG vs. BDD techniques.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Testing and characterization of the one-bit first-order delta-sigma modulator for on-chip analog signal analysis.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Dynamic Timing Analysis Considering Power Supply Noise Effects.

[BibT_eX]

[DOI]

Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

Path Selection and Pattern Generation for Dynamic Timing Analysis Considering Power Supply Noise Effects.

[BibT_eX]

[DOI]

Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

A BIST Scheme for On-Chip ADC and DAC Testing.

[BibT_eX]

[DOI]

Proceedings of the 2000 Design, 2000

Assertion checking by combined word-level ATPG and modular arithmetic constraint-solving techniques.

[BibT_eX]

[DOI]

Proceedings of the 37th Conference on Design Automation, 2000

Test challenges for deep sub-micron technologies.

[BibT_eX]

[DOI]

Proceedings of the 37th Conference on Design Automation, 2000

An FPGA-based re-configurable functional tester for memory chips.

[BibT_eX]

[DOI]

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

Collaboration between Industry and Academia in Test Research.

[BibT_eX]

[DOI]

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

Challenges for the Academic Test Community.

[BibT_eX]

[DOI]

Melvin A. Breuer

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

Testing in the Fourth Dimension.

[BibT_eX]

[DOI]

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

A testability metric for path delay faults and its application.

[BibT_eX]

[DOI]

Proceedings of ASP-DAC 2000, 2000

Performance sensitivity analysis using statistical method and its applications to delay.

[BibT_eX]

[DOI]

Proceedings of ASP-DAC 2000, 2000

A sigma-delta modulation based BIST scheme for mixed-signal circuits.

[BibT_eX]

[DOI]

Proceedings of ASP-DAC 2000, 2000

1999

Primitive delay faults: identification, testing, and design for testability.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

AutoFix: a hybrid tool for automatic logic rectification.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

ErrorTracer: design error diagnosis based on fault simulation techniques.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Fault emulation: A new methodology for fault grading.

[BibT_eX]

[DOI]

Wei-Jin Dai

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Current Directions in Automatic Test-Pattern Generation.

[BibT_eX]

[DOI]

Computer, 1999

A New Bare Die Test Methodology.

[BibT_eX]

[DOI]

Zao Yang

King L. Tai

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

Testing High Speed VLSI Devices Using Slower Testers.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

Specification Back-Propagation and Its Application to DC Fault Simulation for Analog/Mixed-Signal Circuits.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

Delay testing considering power supply noise effects.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

VIP - an input pattern generator for indentifying critical voltage drop for deep sub-micron designs.

[BibT_eX]

[DOI]

Tak K. Young

Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

Improving the Test Quality for Scan-Based BIST Using a General Test Application Scheme.

[BibT_eX]

[DOI]

Sudipta Bhawmik

Proceedings of the 36th Conference on Design Automation, 1999

Analysis of Performance Impact Caused by Power Supply Noise in Deep Submicron Devices.

[BibT_eX]

[DOI]

Proceedings of the 36th Conference on Design Automation, 1999

1998

Efficient test-point selection for scan-based BIST.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 1998

Test-point insertion: scan paths through functional logic.

[BibT_eX]

[DOI]

Chih-Chang Lin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

A hybrid methodology for switching activities estimation.

[BibT_eX]

[DOI]

David Ihsin Cheng

Deborah C. Wang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

An almost full-scan BIST solution-higher fault coverage and shorter test application time.

[BibT_eX]

[DOI]

Sudipta Bhawmik

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

National Science Foundation Workshop on Future Research Directions in Testing of Electronic Circuits and Systems: executive summary of workshop report.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

LIBRA - a library-independent framework for post-layout performance optimization.

[BibT_eX]

[DOI]

Yucheng Wang

Proceedings of the 1998 International Symposium on Physical Design, 1998

Estimation of maximum power supply noise for deep sub-micron designs.

[BibT_eX]

[DOI]

An-Chang Deng

Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

Exact and Approximate Estimation for Maximum Instantaneous Current of CMOS Circuits.

[BibT_eX]

[DOI]

Proceedings of the 1998 Design, 1998

Functional Scan Chain Testing.

[BibT_eX]

[DOI]

Douglas Chang

Proceedings of the 1998 Design, 1998

Fault-Simulation Based Design Error Diagnosis for Sequential Circuits.

[BibT_eX]

[DOI]

Proceedings of the 35th Conference on Design Automation, 1998

A Hybrid Power Model for RTL Power Estimation.

[BibT_eX]

[DOI]

Proceedings of the ASP-DAC '98, 1998

1997

Pseudorandom testing for mixed-signal circuits.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Postlayout logic restructuring using alternative wires.

[BibT_eX]

[DOI]

Nam Sung Woo

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Resynthesis of Combinational Circuits for Path Count Reduction and for Path Delay Fault Testability.

[BibT_eX]

[DOI]

J. Electron. Test., 1997

Guest Editorial.

[BibT_eX]

[DOI]

Kewal K. Saluja

Hans-Joachim Wunderlich

J. Electron. Test., 1997

Incremental logic rectification.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

Fault Macromodeling for Analog/Mixed-Signal Circuits.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Design for Primitive Delay Fault Testability.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Error Tracer: A Fault-Simualtion-Based Approach to Design Error Diagnosis.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Analog Fault Diagnosis for Unpowered Circuit Boards.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

A Hybrid Algorithm for Test Point Selection for Scan-Based BIST.

[BibT_eX]

[DOI]

Proceedings of the 34st Conference on Design Automation, 1997

Vector Generation for Maximum Instantaneous Current Through Supply Lines for CMOS Circuits.

[BibT_eX]

[DOI]

Proceedings of the 34st Conference on Design Automation, 1997

Post-Layout Logic Restructuring for Performance Optimization.

[BibT_eX]

[DOI]

Proceedings of the 34st Conference on Design Automation, 1997

A Test Synthesis Approach to Reducing BALLAST DFT Overhead.

[BibT_eX]

[DOI]

Douglas Chang

Takashi Aikyo

Proceedings of the 34st Conference on Design Automation, 1997

AQUILA: An equivalence verifier for large sequential circuits.

[BibT_eX]

[DOI]

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996

Automatic generation of functional vectors using the extended finite state machine model.

[BibT_eX]

[DOI]

A. S. Krishnakumar

ACM Trans. Design Autom. Electr. Syst., 1996

Gate-level test generation for sequential circuits.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 1996

Classification and identification of nonrobust untestable path delay faults.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

Perturb and simplify: multilevel Boolean network optimizer.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

Generation of High Quality Tests for Robustly Untestable Path Delay Faults.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1996

Fault macromodeling and a testing strategy for opamps.

[BibT_eX]

[DOI]

Sandeep Gupta

J. Electron. Test., 1996

Implicit functional testing for analog circuits.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Identification and Test Generation for Primitive Faults.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

An ATPG-Based Framework for Verifying Sequential Equivalence.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

A novel methodology for transistor-level power estimation.

[BibT_eX]

[DOI]

Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

Driving toward higher IDDQ test quality for sequential circuits: a generalized fault model and its ATPG.

[BibT_eX]

[DOI]

Hisashi Kondo

Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

On Verifying the Correctness of Retimed Circuits.

[BibT_eX]

[DOI]

Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

Resynthesis of Combinational Circuts for Path Count Reduction and for Path Delay Fault Testability.

[BibT_eX]

[DOI]

Proceedings of the 1996 European Design and Test Conference, 1996

Test Point Insertion: Scan Paths through Combinational Logic.

[BibT_eX]

[DOI]

Chih-Chang Lin

Proceedings of the 33st Conference on Design Automation, 1996

Compact Vector Generation for Accurate Power Simulation.

[BibT_eX]

[DOI]

Proceedings of the 33st Conference on Design Automation, 1996

Error Correction Based on Verification Techniques.

[BibT_eX]

[DOI]

Proceedings of the 33st Conference on Design Automation, 1996

A New Hybrid Methodology for Power Estimation.

[BibT_eX]

[DOI]

David Ihsin Cheng

Deborah C. Wang

Proceedings of the 33st Conference on Design Automation, 1996

An Efficient Compact Test Generator for IDDQ Testing.

[BibT_eX]

[DOI]

Hisashi Kondo

Proceedings of the 5th Asian Test Symposium (ATS '96), 1996

Built-In Self Test for Analog and Mixed-Signal Designs.

[BibT_eX]

[DOI]

Proceedings of the 5th Asian Test Symposium (ATS '96), 1996

1995

Combinational and sequential logic optimization by redundancy addition and removal.

[BibT_eX]

[DOI]

Luis Entrena-Arrontes

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Timing-Driven Partial Scan.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 1995

Single-Clock Partial Scan.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 1995

Generation of high quality tests for functional sensitizable paths.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Partial scan designs without using a separate scan clock.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Timing-Driven Test Point Insertion for Full-Scan and Partial-Scan BIST.

[BibT_eX]

[DOI]

Chih-Jen Lin

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

Pseudo-random testing and signature analysis for mixed-signal circuits.

[BibT_eX]

[DOI]

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Fault emulation: a new approach to fault grading.

[BibT_eX]

[DOI]

Wei-Jin Dai

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Fast Identification of Robust Dependent Path Delay Faults.

[BibT_eX]

[DOI]

Proceedings of the 32st Conference on Design Automation, 1995

Logic Synthesis for Engineering Change.

[BibT_eX]

[DOI]

Chih-Chang Lin

Proceedings of the 32st Conference on Design Automation, 1995

An Efficient Algorithm for Local Don't Care Sets Calculation.

[BibT_eX]

[DOI]

Proceedings of the 32st Conference on Design Automation, 1995

Logic optimization by an improved sequential redundancy addition and removal techniques.

[BibT_eX]

[DOI]

Uwe Gläser

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1994

A comprehensive fault macromodel for opamps.

[BibT_eX]

[DOI]

Sandeep Gupta

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

On the Computation of the Set of Reachable States of Hybrid Models.

[BibT_eX]

[DOI]

A. S. Krishnakumar

Proceedings of the 31st Conference on Design Automation, 1994

Generation of High Quality Non-Robust Tests for Path Delay Faults.

[BibT_eX]

[DOI]

Proceedings of the 31st Conference on Design Automation, 1994

Layout Driven Logic Synthesis for FPGAs.

[BibT_eX]

[DOI]

Nam Sung Woo

Proceedings of the 31st Conference on Design Automation, 1994

1993

STOIC: state assignment based on output/input functions.

[BibT_eX]

[DOI]

Irith Pomeranz

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

On the over-specification problem in sequential ATPG algorithms.

[BibT_eX]

[DOI]

Hi-Keung Tony Ma

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Delay-fault test generation and synthesis for testability under a standard scan design methodology.

[BibT_eX]

[DOI]

Srinivas Devadas

Kurt Keutzer

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Transition fault testing for sequential circuits.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Redundancy removal for sequential circuits without reset states.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Guest Editor's Introduction.

[BibT_eX]

Wayne Wei-Ming Dai

IEEE Des. Test Comput., 1993

Delay Testing for Non-Robust Untestable Circuits.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

Sequential logic optimization by redundancy addition and removal.

[BibT_eX]

[DOI]

Luis Entrena

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Automatic Functional Test Generation Using the Extended Finite State Machine Model.

[BibT_eX]

[DOI]

A. S. Krishnakumar

Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992

A functional fault model for sequential machines.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

Initializability Consideration in Sequential Machine Synthesis.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1992

Recent advances in sequential test generation.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992

Transition Fault Simulation for Sequential Circuits.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

Test generation for delay faults in non-scan and partial scan sequential circuits.

[BibT_eX]

[DOI]

Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

State Assignment Using Input/Output Functions.

[BibT_eX]

[DOI]

Irith Pomeranz

Proceedings of the 29th Design Automation Conference, 1992

1991

A Partial Enhanced-Scan Approach to Robust Delay-Fault Test Generation for Sequential Circuits.

[BibT_eX]

[DOI]

Srinivas Devadas

Kurt Keutzer

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

An ATPG-Based Approach to Sequential Logic Optimization.

[BibT_eX]

[DOI]

Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Robust Delay-Fault Test Generation and Synthesis for Testability Under A Standard Scan Design Methodology.

[BibT_eX]

[DOI]

Srinivas Devadas

Kurt Keutzer

Proceedings of the 28th Design Automation Conference, 1991

On Removing Redundancy in Sequential Circuits.

[BibT_eX]

[DOI]

Proceedings of the 28th Design Automation Conference, 1991

1990

A Simulation-Based Method for Generating Tests for Sequential Circuits.

[BibT_eX]

[DOI]

Ernest S. Kuh

IEEE Trans. Computers, 1990

A Partial Scan Method for Sequential Circuits with Feedback.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1990

Finite state machine synthesis with embedded test function.

[BibT_eX]

[DOI]

J. Electron. Test., 1990

Functional test generation for finite state machines.

[BibT_eX]

[DOI]

Alberto L. Sangiovanni-Vincentelli

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

Timing Optimization with Testability Considerations.

[BibT_eX]

[DOI]

Alexander Saldanha

Robert K. Brayton

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

A Single-State-Transition Fault Model for Sequential Machines.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

An architecture for synthesis of testable finite state machines.

[BibT_eX]

[DOI]

Proceedings of the European Design Automation Conference, 1990

An Entropy Measure for the Complexity of Multi-Output Boolean Functions.

[BibT_eX]

[DOI]

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

Test Function Specification in Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989

A directed search method for test generation using a concurrent simulator.

[BibT_eX]

[DOI]

Prathima Agrawal

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

Fault Simulation in a Pipelined Multiprocessor System.

[BibT_eX]

[DOI]

Proceedings of the Proceedings International Test Conference 1989, 1989

Design of sequential machines for efficient test generation.

[BibT_eX]

[DOI]

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

State assignment for initializable synthesis (gate level analysis).

[BibT_eX]

[DOI]

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

An economical scan design for sequential logic test generation.

[BibT_eX]

[DOI]

Proceedings of the Nineteenth International Symposium on Fault-Tolerant Computing, 1989

1988

Designing circuits with partial scan.

[BibT_eX]

[DOI]

IEEE Des. Test, 1988

A sequential circuit test generation using threshold-value simulation.

[BibT_eX]

[DOI]

Ernest S. Kuh

Proceedings of the Eighteenth International Symposium on Fault-Tolerant Computing, 1988

Contest: A Concurrent Test Generator for Sequential Circuits.

[BibT_eX]

[DOI]