Duy Thanh Nguyen

Orcid: 0000-0002-3448-0618

According to our database¹, Duy Thanh Nguyen authored at least 16 papers between 1999 and 2023.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Links

On csauthors.net:

Bibliography

2023

Bedot: Bit Efficient Dot Product for Deep Generative Models.

[BibT_eX]

[DOI]

Proceedings of the Next Generation Arithmetic - 4th International Conference, 2023

2022

ShortcutFusion: From Tensorflow to FPGA-Based Accelerator With a Reuse-Aware Memory Allocation for Shortcut Data.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2021

Layer-Specific Optimization for Mixed Data Flow With Mixed Precision in FPGA Design for CNN-Based Object Detectors.

[BibT_eX]

[DOI]

Duy Thanh Nguyen

Hyun Kim

Hyuk-Jae Lee

IEEE Trans. Circuits Syst. Video Technol., 2021

OBET: On-the-Fly Byte-Level Error Tracking for Correcting and Detecting Faults in Unreliable DRAM Systems.

[BibT_eX]

[DOI]

Sensors, 2021

ShortcutFusion: From Tensorflow to FPGA-based accelerator with reuse-aware memory allocation for shortcut data.

[BibT_eX]

[DOI]

CoRR, 2021

ZEM: Zero-Cycle Bit-Masking Module for Deep Learning Refresh-Less DRAM.

[BibT_eX]

[DOI]

IEEE Access, 2021

Posit Arithmetic for the Training and Deployment of Generative Adversarial Networks.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

An Approximate Memory Architecture for Energy Saving in Deep Learning Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

DRAMA: An Approximate DRAM Architecture for High-performance and Energy-efficient Deep Training System.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

PCM: Precision-Controlled Memory System for Energy Efficient Deep Neural Network Training.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

A High-Throughput and Power-Efficient FPGA Implementation of YOLO CNN for Object Detection.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

Energy-efficient DNN-training with Stretchable DRAM Refresh Controller and Critical-bit Protection.

[BibT_eX]

[DOI]

Duy Thanh Nguyen

Ik-Joon Chang

Proceedings of the 2019 International SoC Design Conference, 2019

St-DRC: Stretchable DRAM Refresh Controller with No Parity-overhead Error Correction Scheme for Energy-efficient DNNs.

[BibT_eX]

[DOI]

Duy Thanh Nguyen

Nhut-Minh Ho

Ik-Joon Chang

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

An Approximate Memory Architecture for a Reduction of Refresh Power Consumption in Deep Learning Applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2013

Market-Based Demand Response Scheduling in a Deregulated Environment.

[BibT_eX]

[DOI]

Duy Thanh Nguyen

Michael Negnevitsky

Martin de Groot

IEEE Trans. Smart Grid, 2013

1999

Correlation properties of wavelet transform and applications in image coding.

[BibT_eX]

[DOI]

Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999

Duy Thanh Nguyen

Timeline

Legend:

Links

On csauthors.net:

Bibliography

Loading...