Eduardo Marañon Aguilar

According to our database, Eduardo Marañon Aguilar authored at least 3 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

Impact of Partial TMR on RISC-V Processor Reliability.

Eduardo Marañon Aguilar, Fabio Benevenuti, Fernanda L. Kastensmidt, Nilberto H. Medina, Nemitala Added, Vitor A. P. de Aguiar, Marcilei Aparecida Guazzelli

IEEE Des. Test, April, 2026

2025

Exploring Parallelism in ZynqNet AI Engine to Accelerate Image Classification in Aerospace.

Eduardo Marañon Aguilar, Fabio Benevenuti, Fernanda Lima Kastensmidt

Proceedings of the 16th IEEE Latin America Symposium on Circuits and Systems, 2025

2024

Hardening a RISC-V Softcore for Embedded Aerospace Applications in SRAM-based FPGA.

Eduardo Marañon Aguilar, Fabio Benevenuti, Fernanda Lima Kastensmidt

Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024