According to our database1, Enrico Martinelli
Legend:Book In proceedings Article PhD thesis Other
Olympic: A Hierarchical All-Optical Photonic Network for Low-Power Chip Multiprocessors.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
A high performance ROM-based structure for modular exponentiation.
Computers & Electrical Engineering, 2011
Instruction Set Extensions for Cryptographic Applications.
Proceedings of the Cryptographic Engineering, 2009
Effects of Instruction-Set Extensions on an Embedded Processor: A Case Study on Elliptic Curve Cryptography over GF(2/sup m/).
IEEE Trans. Computers, 2008
Inclusion of a Montgomery Multiplier Unit into an Embedded Processor's Datapath to Speed-up Elliptic Curve Cryptography.
Proceedings of the Third International Symposium on Information Assurance and Security, 2007
NEUROM: a ROM based RNS digital neuron.
Neural Networks, 2005
A workload characterization of elliptic curve cryptography methods in embedded environments.
SIGARCH Computer Architecture News, 2004
WebMIPS: a new web-based MIPS simulation environment for computer architecture education.
Proceedings of the 2004 workshop on Computer architecture education, 2004
A Performance Evaluation of ARM ISA Extension for Elliptic Curve Cryptography over Binary Finite Fields.
Proceedings of the 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2004), 2004
How to fake an RSA signature by encoding modular root finding as a SAT problem.
Discrete Applied Mathematics, 2003
Fast modular exponentiation of large numbers with large exponents.
Journal of Systems Architecture, 2002
Adaptive graphical pattern recognition for the classification of company logos.
Pattern Recognition, 2001
Learning User Profiles in NAUTILUS.
Proceedings of the Adaptive Hypermedia and Adaptive Web-Based Systems, 2000
A Voice Device with an Application-Adapted Protocol for Microsoft Windows.
Proceedings of the IEEE International Conference on Multimedia Computing and Systems, 1999
Inductive inference from noisy examples using the hybrid finite state filter.
IEEE Trans. Neural Networks, 1998
Sign detection in residue arithmetic units.
Journal of Systems Architecture, 1998
Logic Design of a Fast Circuit for Iterative Additions in Redundant Hybrid.
Comput. J., 1998
Inductive Inference of Tree Automata by Recursive Neural Networks.
Proceedings of the AI*IA 97: Advances in Artificial Intelligence, 1997
Liquidity management with fuzzy qualitative constraints.
Decision Support Systems, 1995
On the Lower Bound to the VLSI Complexity of Number Conversion from Weighted to Residue Representation.
IEEE Trans. Computers, 1993
A VLSI Modulo m Multiplier.
IEEE Trans. Computers, 1991
A VLSI architecture for RNS with MI adders.
A VLSI structure forX(modm) operation.
VLSI Signal Processing, 1990
VLSI Binary-Residue Converters for Pipelined Processing.
Comput. J., 1990
Fast hardware graphic generators of curve families.
Computers & Graphics, 1986
A Fast VLSI Conversion Between Binary and Residue Systems.
Inf. Process. Lett., 1984
A fast near optimum VLSI implementation of FFT using residue number systems.
On switching network functionalities and their relationships.
International Journal of Parallel Programming, 1982
LSI components modelling in a three-valued functional simulation.
Proceedings of the 15th Design Automation Conference, 1978