Eric Fiene

According to our database, Eric Fiene authored at least 3 papers between 1985 and 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2002

Test Methodology for Motorola's High Performance e500 Core Based on PowerPC Instruction Set Architecture.

Robert Bailey, A. Metayer, B. Svrcek, Nandu Tendolkar, E. Wolf, Eric Fiene, Mike Alexander, Rick Woltenberg, Rajesh Raina

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

1997

A G3 PowerPC™ superscalar low-power microprocessor.

A. Richard Kennedy, Mike Alexander, Eric Fiene, Jose A. Lyon, Belli Kuttanna, Rajesh Patel, Mydung N. Pham, Michael Putrino, Cody Croxton, Suzanne Litch, Brad Burgess

Proceedings of the Proceedings IEEE COMPCON 97, 1997

1985

Network Facility for a Reconfigurable Computer Architecture.

Manjai Lee, Eric Fiene, Chuan-lin Wu, Geoffrey Brown, Nader Bagherzadeh

Proceedings of the 5th International Conference on Distributed Computing Systems, 1985