Eric N. Tran

According to our database, Eric N. Tran authored at least 4 papers between 2004 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

Silicon Evaluation of Logic Proximity Bridge Patterns.

Eric N. Tran, Vishwashanth Kasulasrinivas, Sreejit Chakravarty

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

2005

Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor.

Sreejit Chakravarty, Yi-Shing Chang, Hiep Hoang, Sridhar Jayaraman, Silvio Picano, Cheryl Prunty, Eric W. Savage, Rehan Sheikh, Eric N. Tran, Khen Wee

Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005

Logic proximity bridges.

Eric N. Tran, Vamsee Krishna, Sujit T. Zachariah, Sreejit Chakravarty

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

2004

Defect Coverage Analysis of Partitioned Testing.

Sreejit Chakravarty, Eric W. Savage, Eric N. Tran

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004