Eugene Yip

According to our database, Eugene Yip authored at least 13 papers between 2013 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Optimising the Scheduling of System Level Logical Execution Time Systems.

Jamie Lee, Nathan Allen, Matthew M. Y. Kuo, Eugene Yip

Proceedings of the International Symposium on Formal Methods and Models for System Design, 2025

2024

SWTbahn: An Embedded Software Demonstrator in Symbiosis with Embedded Software Education.

Bernhard M. Luedtke, Eugene Yip, Gerald Lüttgen

Proceedings of the Software Engineering im Unterricht der Hochschulen, 2024

2023

Synchronous Deterministic Parallel Programming for Multi-Cores with ForeC.

Eugene Yip, Alain Girault, Partha S. Roop, Morteza Biglari-Abhari

ACM Trans. Program. Lang. Syst., June, 2023

LetSynchronise: An Open-Source Framework for Analysing and Optimising Logical Execution Time Systems.

Eugene Yip, Matthew M. Y. Kuo

Proceedings of Cyber-Physical Systems and Internet of Things Week 2023, 2023

2019

Lightweight Semantics-Preserving Communication for Real-Time Automotive Software.

Eugene Yip, Erjola Lalo, Gerald Lüttgen, Andreas Sailer

Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019

A Multi-Rate Precision Timed Programming Language for Multi-Cores.

Alain Girault, Nicolas Hili, Eric Jenn, Eugene Yip

Proceedings of the 2019 Forum for Specification and Design Languages, 2019

2018

Towards the Emulation of the Cardiac Conduction System for Pacemaker Validation.

Eugene Yip, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark L. Trew, Weiwei Ai, Nitish D. Patel

ACM Trans. Cyber Phys. Syst., 2018

A Parametric Computational Model of the Action Potential of Pacemaker Cells.

Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Sidharta Andalam, Eugene Yip, Nathan Allen, Mark L. Trew

IEEE Trans. Biomed. Eng., 2018

2016

Towards the Emulation of the Cardiac Conduction System for Pacemaker Testing.

Eugene Yip, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew, Weiwei Ai, Nitish D. Patel

CoRR, 2016

The ForeC Synchronous Deterministic Parallel Programming Language for Multicores.

Eugene Yip, Alain Girault, Partha S. Roop, Morteza Biglari-Abhari

Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

2015

A synchronous rendering of hybrid systems for designing Plant-on-a-Chip (PoC).

Avinash Malik, Partha S. Roop, Sidharta Andalam, Eugene Yip, Mark Trew

CoRR, 2015

2014

Relaxing the synchronous approach for mixed-criticality systems.

Eugene Yip, Matthew M. Y. Kuo, Partha S. Roop, David Broman

Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014

2013

Programming and Timing Analysis of Parallel Programs on Multicores.

Eugene Yip, Partha S. Roop, Morteza Biglari-Abhari, Alain Girault

Proceedings of the 13th International Conference on Application of Concurrency to System Design, 2013