Fabian Olivera

Orcid: 0000-0002-8120-2338

According to our database1, Fabian Olivera authored at least 12 papers between 2015 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
Violation Constraint-Handling Genetic Algorithm for Fully-Differential OTA Design Optimization.
Proceedings of the 38th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2025

Clonal Selection Algorithm Applied to the Design of Switched-Capacitor DC-DC Converters.
Proceedings of the 16th IEEE Latin America Symposium on Circuits and Systems, 2025

2024
EAVREF: An Evolutionary Algorithm Based Tool for Low-Power CMOS Voltage Reference Designs.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

2022
Ultra-Low-Power CMOS Voltage Reference Topologies Regarding Technology Node.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

2021
A 120 mV Supply, Triode-Regulated Femto-Watt CMOS Voltage Reference Design.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Three-Stage Charge Pump with Forward Body Biasing in 28 nm UTBB FD-SOI CMOS.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

2020
Adjustable Output CMOS Voltage Reference Design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Closed-Form Analysis of Metastability Voltage in 28 nm UTBB FD-SOI CMOS Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2018
Static noise margin trade-offs for 6T-SRAM cell sizing in 28 nm UTBB FD-SOI CMOS technology.
Microelectron. J., 2018

2017
Analytic modeling of static noise margin considering DIBL and body bias effects.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Analytic boundaries for 6T-SRAM design in standby mode.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

2015
A computer-aided approach for voltage reference circuit design.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015


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