Fabian Olivera

Orcid: 0000-0002-8120-2338

According to our database1, Fabian Olivera authored at least 9 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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Bibliography

2022
Ultra-Low-Power CMOS Voltage Reference Topologies Regarding Technology Node.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

2021
A 120 mV Supply, Triode-Regulated Femto-Watt CMOS Voltage Reference Design.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Three-Stage Charge Pump With Forward Body Biasing in 28 nm UTBB FD-SOI CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2020
Closed-Form Analysis of Metastability Voltage in 28-nm UTBB FD-SOI CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Adjustable Output CMOS Voltage Reference Design.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

2018
Static noise margin trade-offs for 6T-SRAM cell sizing in 28 nm UTBB FD-SOI CMOS technology.
Microelectron. J., 2018

2017
Analytic modeling of static noise margin considering DIBL and body bias effects.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Analytic boundaries for 6T-SRAM design in standby mode.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

2015
A computer-aided approach for voltage reference circuit design.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015


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