Fang-Ting Chou

According to our database, Fang-Ting Chou authored at least 5 papers between 2014 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

Glitch Energy Reduction and SFDR Enhancement Techniques for Low-Power Binary-Weighted Current-Steering DAC.

Fang-Ting Chou, Chung-Chih Hung

IEEE Trans. Very Large Scale Integr. Syst., 2016

2015

A novel 12-bit current-steering DAC with two reference currents.

Fang-Ting Chou, Zong-Yi Chen, Hsing-Chien Chu, Chung-Chih Hung

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

A compact 12-bit DAC with novel bias scheme.

Fang-Ting Chou, Chung-Chih Hung

IEICE Electron. Express, 2014

A 10-bit 250MS/s low-glitch binary-weighted digital-to-analog converter.

Fang-Ting Chou, Zong-Yi Chen, Chung-Chih Hung

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

A novel glitch reduction circuitry for binary-weighted DAC.

Fang-Ting Chou, Chia-Min Chen, Zong-Yi Chen, Chung-Chih Hung

Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014