Chung-Chih Hung

According to our database1, Chung-Chih Hung authored at least 58 papers between 1996 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2021
A Comparative Analysis of Time-Domain and Digital-Domain Hardware Accelerators for Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
A 0.3V 10b 3MS/s SAR ADC With Comparator Calibration and Kickback Noise Reduction for Biomedical Applications.
IEEE Trans. Biomed. Circuits Syst., 2020

Compute-in-Time for Deep Neural Network Accelerators: Challenges and Prospects.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Improved Design and In Vivo Animal Tests of Bone-Guided Cochlear Implant Microsystem with Monopolar Biphasic Multiple Stimulation and Neural Action Potential Acquisition.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019
Design and In Vivo Verification of a CMOS Bone-Guided Cochlear Implant Microsystem.
IEEE Trans. Biomed. Eng., 2019

A 0.35-V 240-μW Fast-Lock and Low-Phase-Noise Frequency Synthesizer for Implantable Biomedical Applications.
IEEE Trans. Biomed. Circuits Syst., 2019

Hardware security threats and countermeasures: a study of obfuscation, camouflaging and PUFs.
Int. J. Multim. Intell. Secur., 2019

10-Bit SAR ADC With Novel Pseudo-Random Capacitor Switching Scheme.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

Current-Voltage-Dual-Mode DC-DC Buck Converter with Adaptive Clock Control.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Package and Chip Accelerated Aging Methods for Power MOSFET Reliability Evaluation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
A high-performance current-mode DC-DC buck converter with adaptive clock control technique.
Proceedings of the 2018 International Symposium on VLSI Design, 2018

2017
An all-digital phase-locked loop with a multi-delay-switching TDC.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

A dual-input high-efficiency li-ion battery charger with current-mode smooth transition and ripple reduction circuits.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016
Glitch Energy Reduction and SFDR Enhancement Techniques for Low-Power Binary-Weighted Current-Steering DAC.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Low-power CMOS bandpass filter for application of cochlear prosthesis.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

2015
A 65-77 GHz low power, meander-type transmission line CMOS low-noise amplifier.
IEICE Electron. Express, 2015

Dual-band voltage controlled oscillator with optimized Gm.
IEICE Electron. Express, 2015

A 5.8 mW Continuous-Time ΔΣ Modulator With 20 MHz Bandwidth Using Time-Domain Flash Quantizer.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

Full-custom all-digital phase locked loop for clock generation.
Proceedings of the VLSI Design, Automation and Test, 2015

A novel 12-bit current-steering DAC with two reference currents.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
A compact 12-bit DAC with novel bias scheme.
IEICE Electron. Express, 2014

A 10-bit 250MS/s low-glitch binary-weighted digital-to-analog converter.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

DLL-based pulse-width modulation digital-to-analog converter for continuous-time sigma delta modulators.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Single inductor quad output switching converter with priority-scheduled program for fast transient and unlimited-load range in 40nm CMOS technology.
Proceedings of the ESSCIRC 2014, 2014

A novel glitch reduction circuitry for binary-weighted DAC.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

Jitter compensation technique for continuous-time sigma-delta modulator.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013
All-Digital Fast-Locking Pulsewidth-Control Circuit With Programmable Duty Cycle.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Spur-Reduction Frequency Synthesizer Exploiting Randomly Selected PFD.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Fast Transient Low-Dropout Voltage Regulator With Hybrid Dynamic Biasing Technique for SoC Application.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Sub-sampling charge pump and random pulsewidth matching technique for frequency synthesizer.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Ring-VCO based low noise and low spur frequency synthesizer.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
Random Pulsewidth Matching Frequency Synthesizer With Sub-Sampling Charge Pump.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

40MHz Gm-C filter with high linearity OTA for wireless applications.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

Low-spur technique for Integer-N phase-locked loop.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A single-inductor multiple-output boost converter with freewheel charge-pump control.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
A 1 GHz Equiripple Low-Pass Filter With a High-Speed Automatic Tuning Scheme.
IEEE Trans. Very Large Scale Integr. Syst., 2011

A fast self-reacting capacitor-less low-dropout regulator.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010
A -68.5 dB IM3 Low-Voltage CMOS Transconductor with Wide Tuning Range.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

A low-noise wide range delta-sigma frequency synthesizer for DTV broadband.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
A Wide Tuning Range G<sub>m</sub>-C Filter for Multi-Mode CMOS Direct-Conversion Wireless Receivers.
IEEE J. Solid State Circuits, 2009

An Inductor-coupling Resonated CMOS Low Noise Amplifier for 3.1-10.6GHz Ultra-wideband System.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A Capacitor-free CMOS Low-dropout Voltage Regulator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A 250MHz Gm-C filter using negative current feedback OTAs.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
A 40-MHz Double Differential-Pair CMOS OTA With -hbox60-dB IM3.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Multimode G<sub>m</sub>- C Channel Selection Filter for Mobile Applications in 1-V Supply Voltage.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

2007
A 1-V 50-MHz Pseudodifferential OTA With Compensation of the Mobility Reduction.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

A Wide Tuning Range G<sub>m</sub> - C Continuous-Time Analog Filter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

A 1V-2.39mW capacitor-coupling resonated low noise amplifier for 3-5GHz ultra-wideband system.
Proceedings of the 2007 IEEE International SOC Conference, 2007

A 1V CMOS low-noise amplifier with inductive resonated for 3.1-10.6GHz UWB wireless receiver.
Proceedings of the 2007 IEEE International SOC Conference, 2007

1-V Linear CMOS Transconductor with 65 dB THD in Nano-Scale CMOS Technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Low-Power CMOS Voltage Reference Circuit Based On Subthreshold Operation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Low-Voltage Multi-Mode Gm-C Channel Selection Filter for Mobile Applications.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
A Reliable Low-Voltage Low-Distortion MOS Analog Switch.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

A high speed and high linearity OTA in 1-V power supply voltage.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
A low-voltage low-distortion MOS sampling switch.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

1997
A low-voltage, low-power CMOS fifth-order elliptic GM-C filter for baseband mobile, wireless communication.
IEEE Trans. Circuits Syst. Video Technol., 1997

1996
Low-voltage, micropower weak-inversion CMOS GM-C filter.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996


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