Fang Zhou

According to our database, Fang Zhou authored at least 37 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

A Lightweight BiSeNet Embedded with YOLOv5 Feature Fusion Network.

Jin Zhao, Fang Zhou, Fen Ge, Shuning Wu, Hao Wang

Proceedings of the 23rd IEEE International Conference on Communication Technology, 2023

A Deep Q Network Hardware Accelerator Based on Heterogeneous Computing.

Guohui Zhang, Fen Ge, Fang Zhou

Proceedings of the 15th IEEE International Conference on ASIC, 2023

A Method of Mapping Convolutional Neural Networks on Resource-limited NoC Platform.

Jiantao Ye, Fen Ge, Fang Zhou

Proceedings of the 15th IEEE International Conference on ASIC, 2023

A Multi-mode Convolution Coprocessor Based on RISC-V Instruction Set Architecture.

Wenqiang Gong, Fang Zhou, Fen Ge

Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022

The Design of a Novel Hardware Trojan without Inactive Signal for AES.

Kaiyu Zhao, Fang Zhou, Ning Wu, Jin Zhao, Fen Ge

Proceedings of the 22nd IEEE International Conference on Communication Technology, 2022

A Hybrid CNN Compression Approach for Hardware Acceleration.

Xin Yue, Fen Ge, Fang Zhou, Ning Wu, Yi Zhang

Proceedings of the 22nd IEEE International Conference on Communication Technology, 2022

A Defense Method Against Persistent Fault Attack.

Zhixiang Xu, Ning Wu, Fang Zhou, Fen Ge

Proceedings of the 22nd IEEE International Conference on Communication Technology, 2022

Efficient Configurable Digit-Serial Multiplier Based on Improved Karatsuba Algorithm over GF(2m).

Xinyu Wang, Ning Wu, Fang Zhou, Fen Ge

Proceedings of the 22nd IEEE International Conference on Communication Technology, 2022

An A3C Deep Reinforcement Learning FPGA Accelerator based on Heterogeneous Compute Units.

Ziyu Li, Fen Ge, Fang Zhou, Ning Wu

Proceedings of the 22nd IEEE International Conference on Communication Technology, 2022

Reconfigurable Multi-algorithm Neural Network Accelerator Based on Target Detection.

Wang Han, Ning Wu, Fang Zhou, Fen Ge

Proceedings of the 22nd IEEE International Conference on Communication Technology, 2022

2021

Highly efficient architecture of elliptic curve scalar multiplication with fault tolerance over GF(2^m).

Fang Zhou, Caixian Fei, Ning Wu, Fen Ge

IEICE Electron. Express, 2021

Implementation of Reconfigurable CNN-LSTM Accelerator Based on FPGA.

Ying Yang, Fen Ge, Danfeng Qiu, Xin Yue, Ziyu Li, Fang Zhou, Ning Wu

Proceedings of the 21st International Conference on Communication Technology, 2021

An Anti-DPA Elliptic Curve Cryptography Scalar Multiplier with Randomized Base Point.

Jin Wen, Ning Wu, Fen Ge, Fang Zhou, Zhixiang Xu, Benjun Zhang

Proceedings of the 21st International Conference on Communication Technology, 2021

Hardware Trojan Detection Method for Gate-Level Netlists Based on the Idea of Few-Shot Learning.

Tong Lu, Fang Zhou, Ning Wu, Fen Ge, Benjun Zhang

Proceedings of the 21st International Conference on Communication Technology, 2021

Design and Implementation of OpenCL-Based FPGA Accelerator for YOLOv2.

Chenchen Cui, Fen Ge, Ziyu Li, Xin Yue, Fang Zhou, Ning Wu

Proceedings of the 21st International Conference on Communication Technology, 2021

2020

A Dynamic Branch Predictor Based on Parallel Structure of SRNN.

Lei Zhang, Ning Wu, Fen Ge, Fang Zhou, Mahammad Rehan Yahya

IEEE Access, 2020

Small Area Configurable Deep Neural Network Accelerator for IoT System.

Liangkai Zhao, Ning Wu, Fen Ge, Fang Zhou, Jiahui Zhang, Tong Lu

Proceedings of the 20th IEEE International Conference on Communication Technology, 2020

A Mapping Method for Convolutional Neural Networks on Network-on-Chip.

Yayue Zhao, Fen Ge, Chenchen Cui, Fang Zhou, Ning Wu

Proceedings of the 20th IEEE International Conference on Communication Technology, 2020

Design and Implementation of LSTM Accelerator Based on FPGA.

Weifeng Zhang, Fen Ge, Chenchen Cui, Ying Yang, Fang Zhou, Ning Wu

Proceedings of the 20th IEEE International Conference on Communication Technology, 2020

Differential Fault Attack for the Iterative Operation of AES-192 Key Expansion.

Liang Han, Ning Wu, Fen Ge, Fang Zhou, Jin Wen, Peiyao Qing

Proceedings of the 20th IEEE International Conference on Communication Technology, 2020

A Scalable Bit-Parallel Word-Serial Multiplier with Fault Detection on GF(2^m).

Caixian Fei, Fang Zhou, Ning Wu, Fen Ge, Jin Wen, Peiyao Qin

Proceedings of the 20th IEEE International Conference on Communication Technology, 2020

2019

A novel differential fault analysis using two-byte fault model on AES Key schedule.

Jinbao Zhang, Ning Wu, Jianhua Li, Fang Zhou

IET Circuits Devices Syst., 2019

A new method for resisting collision attack based on parallel random delay S-box.

Fang Zhou, Ning Wu, Xiaoqiang Zhang, Jinbao Zhang

IEICE Electron. Express, 2019

Fault attack hardware Trojan detection method based on ring oscillator.

Qiangjia Bi, Ning Wu, Fang Zhou, Jinbao Zhang, Muhammad Rehan Yahya, Fen Ge

IEICE Electron. Express, 2019

A Compact Hardware Implementation for the SCA-resistant PRESENT Cipher.

Xiao Yu, Ning Wu, Fang Zhou, Jinbao Zhang, Xinggan Zhang

Proceedings of the IECON 2019, 2019

A dual-threshold credit-based flow control mechanism for 3D Network-on-Chip.

Xiangli Li, Fen Ge, Ben Rui, Ning Wu, Fang Zhou

Proceedings of the International Conference on IC Design and Technology, 2019

2018

An Optimized Design for Compact Masked AES S-Box Based on Composite Field and Common Subexpression Elimination Algorithm.

Yunfei Ye, Ning Wu, Xiaoqiang Zhang, Liling Dong, Fang Zhou

J. Circuits Syst. Comput., 2018

High performance AES-GCM implementation based on efficient AES and FR-KOA multiplier.

Yong Zhang, Ning Wu, Fang Zhou, Xiaoqiang Zhang, Jinbao Zhang

IEICE Electron. Express, 2018

Countermeasure against fault sensitivity analysis based on clock check block.

Jinbao Zhang, Ning Wu, Fen Ge, Fang Zhou, Xiaoqing Zhang

IEICE Electron. Express, 2018

2017

Collaborative fuzzy-based partially-throttling dynamic thermal management scheme for three-dimensional networks-on-chip.

Gaizhen Yan, Ning Wu, Fen Ge, Hao Xiao, Fang Zhou

IET Comput. Digit. Tech., 2017

ArR-DTM: A routing-based DTM for 3D NoCs by adaptive degree regulation.

Gaizhen Yan, Ning Wu, Fen Ge, Hao Xiao, Fang Zhou

IEICE Electron. Express, 2017

A new compact hardware architecture of S-Box for block ciphers AES and SM4.

Yaoping Liu, Ning Wu, Xiaoqiang Zhang, Fang Zhou

IEICE Electron. Express, 2017

2016

Optimization of Area and Delay for Implementation of the Composite Field Advanced Encryption Standard S-Box.

Xiaoqiang Zhang, Ning Wu, Fang Zhou, Fen Ge

J. Circuits Syst. Comput., 2016

Against fault attacks based on random infection mechanism.

Jinbao Zhang, Ning Wu, Xiaoqiang Zhang, Fang Zhou

IEICE Electron. Express, 2016

Low-delay parallel Chien search architecture for RS decoder.

Xiaoqiang Zhang, Ning Wu, Fang Zhou, Jianhua Li, Yasir Khizar

IEICE Electron. Express, 2016

2015

BTorus: A novel thermal-traffic balanced NoC topology.

Taotao Zhang, Ning Wu, Lei Zhou, Fang Zhou

IEICE Electron. Express, 2015

2014

An optimized delay-aware common subexpression elimination algorithm for hardware implementation of binary-field linear transform.

Xiaoqiang Zhang, Ning Wu, Fang Zhou, Xin Chen

IEICE Electron. Express, 2014