Faraz Adin

According to our database, Faraz Adin authored at least 5 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

98-dB SNDR Multi-Residue Two-Step Incremental ADC With Two-Capacitor SAR.

Faraz Adin, Hanyu Wang, Lukang Shi, Rajiv Singh, Erhan Hancioglu, Gabor C. Temes

IEEE Trans. Circuits Syst. II Express Briefs, August, 2025

An 89.5 dB SNDR 500 kHz BW Largely Passive Fourth-Order Noise-Coupled Delta-Sigma Modulator.

Hanyu Wang, Faraz Adin, Un-Ku Moon, Gabor C. Temes

IEEE Trans. Circuits Syst. I Regul. Pap., August, 2025

A 16 GΩ Input Impedance Amplifier with Flicker Noise Reduction for Neural Recording Applications.

Jyotindra R. Shakya, Gabor C. Temes, Faraz Adin

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2024

Wideband Low-Distortion Noise-Coupled Delta-Sigma ADC.

Hanyu Wang, Faraz Adin, Un-Ku Moon, Gabor C. Temes

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

Multi-Residue Two-Step Incremental ADC.

Faraz Adin, Hanyu Wang, Lukang Shi, Rajiv Singh, Erhan Hancioglu, Gabor C. Temes

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024