Farinoush Saffar

According to our database, Farinoush Saffar authored at least 4 papers between 2012 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

A neural network architecture using high resolution multiplying digital to analog converters.

Farinoush Saffar, Mitra Mirhassani, Majid Ahmadi

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2015

A modular mixed-signal CVNS neural network architecture.

Farinoush Saffar, Mitra Mirhassani, Majid Ahmadi

Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

2012

A Fault-Tolerant Area-Efficient Current-Mode ADC for Multiple-Valued Neural Networks.

Farinoush Saffar, Mitra Mirhassani, Majid Ahmadi

Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

Current mode multiple-valued adder for cryptography processors.

Ashley Novak, Farinoush Saffar, Mitra Mirhassani, Huapeng Wu

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012