Fatemeh Sadat Pourhashemi

According to our database1, Fatemeh Sadat Pourhashemi authored at least 2 papers between 2011 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2012
Timing yield improvement of FPGAs utilizing enhanced architectures and multiple configurations under process variation (abstract only).
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011
Evaluation of FPGA routing architectures under process variation.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011


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