Fatemeh Shirinzadeh

According to our database1, Fatemeh Shirinzadeh authored at least 7 papers between 2020 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Fan-In Aware Graph-Based Optimization for MAC-Based in-Memory Computing.
Proceedings of the 29th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2026

2025
A Comprehensive Synthesis and Verification Approach for RRAM-Based Neuromorphic Computing.
Proceedings of the 28th Euromicro Conference on Digital System Design, 2025

2024
In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

A Multi-Objective Evolutionary Approach for Test Network Design.
Proceedings of the IEEE European Test Symposium, 2024

Towards Formal Verification for MAC-based In-Memory Computing.
Proceedings of the 33rd IEEE Asian Test Symposium, 2024

2023
Verification of In-Memory Logic Design using ReRAM Crossbars.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

2020
Optimal design of adaptive and proportional integral derivative controllers using a novel hybrid particle swarm optimization algorithm.
Trans. Inst. Meas. Control, 2020


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