Florian Lemaitre

Orcid: 0000-0001-9394-2969

According to our database1, Florian Lemaitre authored at least 14 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Optical flow algorithms optimized for speed, energy and accuracy on embedded GPUs.
J. Real Time Image Process., April, 2023

2022
Max-Tree Computation on GPUs.
IEEE Trans. Parallel Distributed Syst., 2022

LSL3D: A Run-Based Connected Component Labeling Algorithm for 3D Volumes.
Proceedings of the Image Analysis and Processing. ICIAP 2022 Workshops, 2022

An Efficient Run-Based Connected Component Labeling Algorithm for Processing Holes.
Proceedings of the Image Analysis and Processing. ICIAP 2022 Workshops, 2022

2021
Taming Voting Algorithms on Gpus for an Efficient Connected Component Analysis Algorithm.
Proceedings of the IEEE International Conference on Acoustics, 2021

Implementations Impact on Iterative Image Processing for Embedded GPU.
Proceedings of the 29th European Signal Processing Conference, 2021

2020
A New Run-based Connected Component Labeling for Efficiently Analyzing and Processing Holes.
CoRR, 2020

How to speed Connected Component Labeling up with SIMD RLE algorithms.
Proceedings of the WPMVP@PPoPP '20: Sixth Workshop on Programming Models for SIMD/Vector Processing lolocated with the 25th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2020

2019
Tracking haute fréquence pour architectures SIMD : optimisation de la reconstruction LHCb. (High frequency tracking for SIMD architectures : optimization of the LHCb reconstruction).
PhD thesis, 2019

A New Real-Time Embedded Video Denoising Algorithm.
Proceedings of the 2019 Conference on Design and Architectures for Signal and Image Processing, 2019

2018
Small SIMD Matrices for CERN High Throughput Computing.
Proceedings of the 4th Workshop on Programming Models for SIMD/Vector Processing, 2018

96 nm Extended Range Laser Source Using Selective Area Growth.
Proceedings of the European Conference on Optical Communication, 2018

2017
Cholesky factorization on SIMD multi-core architectures.
J. Syst. Archit., 2017

2016
Batched Cholesky factorization for tiny matrices.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016


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