Lionel Lacassagne

According to our database1, Lionel Lacassagne authored at least 79 papers between 1998 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Optical flow algorithms optimized for speed, energy and accuracy on embedded GPUs.
J. Real Time Image Process., April, 2023

A new meteor detection application robust to camera movements.
CoRR, 2023

Parallelization of a new embedded application for automatic meteor detection.
CoRR, 2023

Real-Time and Approximate Iterative Optical Flow Implementation on Low-Power Embedded CPUs.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

2022
Max-Tree Computation on GPUs.
IEEE Trans. Parallel Distributed Syst., 2022

Using HLS for Designing a Parametric Optical Flow Hierarchical Algorithm in FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

LSL3D: A Run-Based Connected Component Labeling Algorithm for 3D Volumes.
Proceedings of the Image Analysis and Processing. ICIAP 2022 Workshops, 2022

An Efficient Run-Based Connected Component Labeling Algorithm for Processing Holes.
Proceedings of the Image Analysis and Processing. ICIAP 2022 Workshops, 2022

2021
FPGA Acceleration of the Horn and Schunck Hierarchical Algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Taming Voting Algorithms on Gpus for an Efficient Connected Component Analysis Algorithm.
Proceedings of the IEEE International Conference on Acoustics, 2021

Implementations Impact on Iterative Image Processing for Embedded GPU.
Proceedings of the 29th European Signal Processing Conference, 2021

2020
A New Run-based Connected Component Labeling for Efficiently Analyzing and Processing Holes.
CoRR, 2020

How to speed Connected Component Labeling up with SIMD RLE algorithms.
Proceedings of the WPMVP@PPoPP '20: Sixth Workshop on Programming Models for SIMD/Vector Processing lolocated with the 25th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2020

2019
Designing efficient SIMD algorithms for direct Connected Component Labeling.
Proceedings of the 5th Workshop on Programming Models for SIMD/Vector Processing, 2019

A New Real-Time Embedded Video Denoising Algorithm.
Proceedings of the 2019 Conference on Design and Architectures for Signal and Image Processing, 2019

SparseCCL: Connected Components Labeling and Analysis for sparse images.
Proceedings of the 2019 Conference on Design and Architectures for Signal and Image Processing, 2019

2018
Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors.
J. Real Time Image Process., 2018

Harris corner detection on a NUMA manycore.
Future Gener. Comput. Syst., 2018

Usuba: Optimizing & Trustworthy Bitslicing Compiler.
Proceedings of the 4th Workshop on Programming Models for SIMD/Vector Processing, 2018

Small SIMD Matrices for CERN High Throughput Computing.
Proceedings of the 4th Workshop on Programming Models for SIMD/Vector Processing, 2018

Energy and Execution Time Comparison of Optical Flow Algorithms on SIMD and GPU Architectures.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018

A new Direct Connected Component Labeling and Analysis Algorithms for GPUs.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018

2017
Color enhanced local binary patterns in covariance matrices descriptors (ELBCM).
J. Vis. Commun. Image Represent., 2017

Cholesky factorization on SIMD multi-core architectures.
J. Syst. Archit., 2017

A Fast Implementation of a Spectral Finite Elements Method on CPU and GPU Applied to Ultrasound Propagation.
Proceedings of the Parallel Computing is Everywhere, 2017

Distanceless label propagation: An efficient direct connected component labeling algorithm for GPUs.
Proceedings of the Seventh International Conference on Image Processing Theory, 2017

2016
A modular system for global and local abnormal event detection and categorization in videos.
Mach. Vis. Appl., 2016

A new SIMD iterative connected component labeling algorithm.
Proceedings of the 3rd Workshop on Programming Models for SIMD/Vector Processing, 2016

Special session 1 automotive parallel computing challenges - architectures, applications and tricks.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

Batched Cholesky factorization for tiny matrices.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

2015
Color tracking with contextual switching: real-time implementation on CPU.
J. Real Time Image Process., 2015

Parallel light speed labeling: An efficient connected component labeling algorithm for multi-core processors.
Proceedings of the 2015 IEEE International Conference on Image Processing, 2015

2014
The numerical template toolbox: A modern C++ design for scientific computing.
J. Parallel Distributed Comput., 2014

Covariance tracking: architecture optimizations for embedded systems.
EURASIP J. Adv. Signal Process., 2014

What is the world's fastest connected component labeling algorithm?
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

High level transforms for SIMD and low-level computer vision algorithms.
Proceedings of the 2014 Workshop on Programming models for SIMD/Vector processing, 2014

A review of world's fastest connected component labeling algorithms: Speed and energy estimation.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

2013
High level tranforms toreduce energy consumption of signal and image processing operators.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

Enhanced local binary covariance matrices (ELBCM) for texture analysis and object tracking.
Proceedings of the 6th International Conference on Computer Vision / Computer Graphics Collaboration Techniques and Applications, 2013

Real-time covariance tracking algorithm for embedded systems.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Session 3 (special session): Visual scene analysis in 2D and 3D.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

2012
Motion histogram quantification for human action recognition.
Proceedings of the 21st International Conference on Pattern Recognition, 2012

Accelerator-Based implementation of the Harris Algorithm.
Proceedings of the Image and Signal Processing - 5th International Conference, 2012

Impact of high level transforms on high level synthesis for motion detection algorithm.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

Performance evaluation of total focusing method on GPP and GPU.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

Covariance Descriptor Multiple Object Tracking and Re-identification with Colorspace Evaluation.
Proceedings of the Computer Vision - ACCV 2012 Workshops, 2012

2011
Parallelization Schemes for Memory Optimization on the Cell Processor: A Case Study on the Harris Corner Detector.
Trans. High Perform. Embed. Archit. Compil., 2011

Light speed labeling: efficient connected component labeling on RISC architectures.
J. Real Time Image Process., 2011

Performance Analysis of an Ultrasound Reconstruction Algorithm for Non Destructive Testing.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

Feature points tracking adaptive to saturation.
Proceedings of the 2011 IEEE International Conference on Signal and Image Processing Applications, 2011

Automatic color space switching for robust tracking.
Proceedings of the 2011 IEEE International Conference on Signal and Image Processing Applications, 2011

A systemc TLM framework for distributed simulation of complex systems with unpredictable communication.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Parallelization of an ultrasound reconstruction algorithm for non destructive testing on multicore CPU and GPU.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010
Parallélisation d'opérateurs de TI : multi-cœurs, Cell ou GPU ?
Traitement du Signal, 2010

Color Connectedness Degree for Mean-Shift Tracking.
Proceedings of the 20th International Conference on Pattern Recognition, 2010

Projection-histograms for mean-shift tracking.
Proceedings of the International Conference on Image Processing, 2010

2009
High performance motion detection: some trends toward new embedded architectures for vision systems.
J. Real Time Image Process., 2009

Light Speed Labeling for RISC architectures.
Proceedings of the International Conference on Image Processing, 2009

Motion detection: Fast and robust algorithms for embedded systems.
Proceedings of the International Conference on Image Processing, 2009

Algorithmic Skeletons within an Embedded Domain Specific Language for the CELL Processor.
Proceedings of the PACT 2009, 2009

2008
Altivec Vector Unit Customization for Embedded Systems.
Int. J. Comput. Sci. Appl., 2008

A Smart Architecture for Low-Level Image Computing.
Int. J. Comput. Sci. Appl., 2008

2007
Image Processing Vision Systems: Standard Image Sensors Versus Retinas.
IEEE Trans. Instrum. Meas., 2007

System-Platforms-Based SystemC TLM Design of Image Processing Chains for Embedded Applications.
EURASIP J. Embed. Syst., 2007

Ultra Fast Grey Scale Face Detection Using Vector SIMD Programming.
Proceedings of the Third International IEEE Conference on Signal-Image Technologies and Internet-Based System, 2007

Parallelization schemes for memory optimization on the cell processor: a case study of image processing algorithm.
Proceedings of the 2007 workshop on MEmory performance, 2007

Parallelization Strategies for the Points of Interests Algorithm on the Cell Processor.
Proceedings of the Parallel and Distributed Processing and Applications, 2007

Adaptive Multiresolution for Low Power CMOS Image Sensor.
Proceedings of the International Conference on Image Processing, 2007

2005
Des flottants 16 bits sur microprocesseurs d'usage général pour images et multimédia.
Tech. Sci. Informatiques, 2005

Customizing 16-bit FP Instructions on a NIOS II Processor for FPGA Image and Media Processing.
Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005

16-bit Floating Point Instructions for Embedded Multimedia Applications.
Proceedings of the Seventh International Workshop on Computer Architectures for Machine Perception (CAMP 2005), 2005

Low Power Image Processing: Analog Versus Digital Comparison.
Proceedings of the Seventh International Workshop on Computer Architectures for Machine Perception (CAMP 2005), 2005

Implementing Motion Markov Detection on General Purpose Processor and Associative Mesh.
Proceedings of the Seventh International Workshop on Computer Architectures for Machine Perception (CAMP 2005), 2005

2004
16-Bit FP Sub-Word Parallelism to Facilitate Compiler Vectorization and Improve Performance of Image and Media Processing.
Proceedings of the 33rd International Conference on Parallel Processing (ICPP 2004), 2004

2000
Object Image Retrieval with Image Compactness Vectors.
Proceedings of the 15th International Conference on Pattern Recognition, 2000

1999
Can General Purpose Micro-processors Simulate Neural Networks in Real-Time?
Proceedings of the Engineering Applications of Bio-Inspired Artificial Neural Networks, 1999

Motion Detection, Labeling, Data Association And Tracking, in Real-Time on RISC Computer.
Proceedings of the 1oth International Conference on Image Analysis and Processing (ICIAP 1999), 1999

A generic methodology for the software managing of caches in multi-processors DSP architectures.
Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

1998
Real time execution of optimal edge detectors on RISC and DSP processors.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998


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