Fujie Chen

According to our database1, Fujie Chen authored at least 14 papers between 1990 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2023
Threshold-programmable loss-of-signal detection circuit with temperature compensation.
IEICE Electron. Express, 2023

2020
A 25-Gb/s high-sensitivity transimpedance amplifier with bandwidth enhancement.
IEICE Electron. Express, 2020

2019
Effect of PSO Communication Topologies on Task Matching in Grid Computing.
Proceedings of the IEEE Congress on Evolutionary Computation, 2019

2004
AFEC: An Advanced FEC Algorithm for Video Transmission Control over the Grid.
Proceedings of the Grid and Cooperative Computing, 2004

2001
A theoretical foundation for program transformations to reduce cache thrashing due to true data sharing.
Theor. Comput. Sci., 2001

1998
An Efficient Solution to the Cache Thrashing Problem Caused by True Data Sharing.
IEEE Trans. Computers, 1998

1995
Rearranging the Iteration Space to Eliminate the True Sharing Thrashing in Parallel Processinng Systems.
Proceedings of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, 1995

1994
On the problem of optimizing parallel programs for complex memory hierarchies.
J. Comput. Sci. Technol., 1994

1993
Loop staggering, loop compacting: Restructuring techniques for thrashing problem.
J. Comput. Sci. Technol., 1993

Optimizing FORTRAN programs for hierarchical memory parallel processing systems.
J. Comput. Sci. Technol., 1993

1992
Loop Restructuring Techniques For Thrashing Problem.
Proceedings of the PARLE '92: Parallel Architectures and Languages Europe, 1992

Hybrid Loop Interchange: Optimization for Parallel Programs.
Proceedings of the 6th International Parallel Processing Symposium, 1992

1991
Loop Staggering Loop Staggering and Compacting: Restructuring Techniques for Thrashing Problem.
Proceedings of the International Conference on Parallel Processing, 1991

1990
Processor self-scheduling for parallel loops in preemptive environments.
Future Gener. Comput. Syst., 1990


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