Zhiyuan Li

Affiliations:
  • Purdue University, Department of Computer Science, West Lafayette, IN, USA
  • University of Illinois at Urbana-Champaign, IL, USA (PhD 1989)


According to our database1, Zhiyuan Li authored at least 95 papers between 1985 and 2023.

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Bibliography

2023
What is the Inductive Bias of Flatness Regularization? A Study of Deep Matrix Factorization Models.
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023

2021
A reduced model for compressible viscous heat-conducting multicomponent flows.
CoRR, 2021

2018
Optimizing data layout and system configuration on FPGA-based heterogeneous platforms.
Proceedings of the International Conference on Computer-Aided Design, 2018

2017
Locating Software Faults Based on Minimum Debugging Frontier Set.
IEEE Trans. Software Eng., 2017

Performance Evaluation and Enhancement of Process-Based Parallel Loop Execution.
Int. J. Parallel Program., 2017

2016
GridFOR: A Domain Specific Language for Parallel Grid-Based Applications.
Int. J. Parallel Program., 2016

2014
Petascale large eddy simulation of jet engine noise based on the truncated SPIKE algorithm.
Parallel Comput., 2014

Author's retrospective for array privatization for parallel execution of loops.
Proceedings of the ACM International Conference on Supercomputing 25th Anniversary Volume, 2014

2013
A communication-efficient linear system solver for large eddy simulation of jet engine noise.
Clust. Comput., 2013

General data structure expansion for multi-threading.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2013

Automated Rapid Prototyping of Regular Grid-Based Numerical Applications Using Generalized Elemental Subroutines.
Proceedings of the 27th IEEE International Symposium on Parallel and Distributed Processing, 2013

Effective fault localization based on minimum debugging frontier set.
Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization, 2013

Global property violation detection and diagnosis for wireless sensor networks.
Proceedings of the International Conference on Compilers, 2013

2012
Multi-slicing: a compiler-supported parallel approach to data dependence profiling.
Proceedings of the International Symposium on Software Testing and Analysis, 2012

Performance Study of SIMD Programming Models on Intel Multicore Processors.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Fast loop-level data dependence profiling.
Proceedings of the International Conference on Supercomputing, 2012

2011
Asynchronous Iterative Algorithms.
Proceedings of the Encyclopedia of Parallel Computing, 2011

Dependence-based multi-level tracing and replay for wireless sensor networks debugging.
Proceedings of the ACM SIGPLAN/SIGBED 2011 conference on Languages, 2011

Parallelizing a machine translation decoder for multicore computer.
Proceedings of the Seventh International Conference on Natural Computation, 2011

2010
Improving parallelism and locality with asynchronous algorithms.
Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2010

A compiler-automated array compression scheme for optimizing memory intensive programs.
Proceedings of the 24th International Conference on Supercomputing, 2010

Reducing Communication Overhead in Large Eddy Simulation of Jet Engine Noise.
Proceedings of the 2010 IEEE International Conference on Cluster Computing, 2010

2009
Editorial: Languages, compilers, and tools for embedded systems.
ACM Trans. Embed. Comput. Syst., 2009

Multigrade Security Monitoring for Ad-Hoc Wireless Networks.
Proceedings of the IEEE 6th International Conference on Mobile Adhoc and Sensor Systems, 2009

2008
Dynamic Voltage Scaling for Multitasking Real-Time Systems With Uncertain Execution Time.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

SeNDORComm: An Energy-Efficient Priority-Driven Communication Layer for Reliable Wireless Sensor Networks.
Proceedings of the 27th IEEE Symposium on Reliable Distributed Systems (SRDS 2008), 2008

ASYNC Loop Constructs for Relaxed Synchronization.
Proceedings of the Languages and Compilers for Parallel Computing, 2008

Exploiting idle register classes for fast spill destination.
Proceedings of the 22nd Annual International Conference on Supercomputing, 2008

Analyzing memory access intensity in parallel programs on multicore.
Proceedings of the 22nd Annual International Conference on Supercomputing, 2008

2007
Adaptive correctness monitoring for wireless sensor networks using hierarchical distributed run-time invariant checking.
ACM Trans. Auton. Adapt. Syst., 2007

Simultaneous Minimization of Capacity and Conflict Misses.
J. Comput. Sci. Technol., 2007

A programming environment with runtime energy characterization for energy-aware applications.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

Adaptive computation offloading for energy conservation on battery-powered systems.
Proceedings of the 13th International Conference on Parallel and Distributed Systems, 2007

Energy-Aware Scheduling for Real-Time Multiprocessor Systems with Uncertain Task Execution Time.
Proceedings of the 44th Design Automation Conference, 2007

2006
Detection and Repair of Software Errors in Hierarchical Sensor Networks.
Proceedings of the IEEE International Conference on Sensor Networks, 2006

2005
Page mapping for heterogeneously partitioned caches: Complexity and heuristics.
J. Embed. Comput., 2005

A Polynomial-Time Algorithm for Memory Space Reduction.
Int. J. Parallel Program., 2005

A sample-based cache mapping scheme.
Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, 2005

2004
Automatic tiling of iterative stencil loops.
ACM Trans. Program. Lang. Syst., 2004

Improving Data Locality by Array Contraction.
IEEE Trans. Computers, 2004

Energy cost analysis of IPSec on handheld devices.
Microprocess. Microsystems, 2004

A computation offloading scheme on handheld devices.
J. Parallel Distributed Comput., 2004

Parametric analysis for adaptive computation offloading.
Proceedings of the ACM SIGPLAN 2004 Conference on Programming Language Design and Implementation 2004, 2004

Using cache mapping to improve memory performance handheld devices.
Proceedings of the 2004 IEEE International Symposium on Performance Analysis of Systems and Software, 2004

Applying Array Contraction to a Sequence of DOALL Loops.
Proceedings of the 33rd International Conference on Parallel Processing (ICPP 2004), 2004

Efficient Collection of Sensor Data in Remote Fields Using Mobile Collectors.
Proceedings of the International Conference On Computer Communications and Networks (ICCCN 2004), 2004

A Compiler Scheme for Reusing Intermediate Computation Results.
Proceedings of the 2nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2004), 2004

2003
A Compiler Analysis of Interprocedural Data Communication.
Proceedings of the ACM/IEEE SC2003 Conference on High Performance Networking and Computing, 2003

Operation Reuse on Handheld Devices (Extended Abstract).
Proceedings of the Languages and Compilers for Parallel Computing, 2003

Optimal Skewed Tiling for Cache Locality Enhancement.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Impact of Data Compression on Energy Consumption of Wireless-Networked Handheld Devices.
Proceedings of the 23rd International Conference on Distributed Computing Systems (ICDCS 2003), 2003

2002
Task Allocation for Distributed Multimedia Processing on Wirelessly Networked Handheld Devices.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

2001
A theoretical foundation for program transformations to reduce cache thrashing due to true data sharing.
Theor. Comput. Sci., 2001

Locality Enhancement by Array Contraction.
Proceedings of the Languages and Compilers for Parallel Computing, 2001

An Adaptive Scheme for Dynamic Parallelization.
Proceedings of the Languages and Compilers for Parallel Computing, 2001

Data locality enhancement by memory reduction.
Proceedings of the 15th international conference on Supercomputing, 2001

Interprocedural Analysis Based on Guarded Array Regions.
Proceedings of the Compiler Optimizations for Scalable Parallel Systems Languages, 2001

Computation offloading to save energy on handheld devices: a partition scheme.
Proceedings of the 2001 International Conference on Compilers, 2001

2000
Efficient Interprocedural Array Data-Flow Analysis for Automatic Program Parallelization.
IEEE Trans. Software Eng., 2000

A Hierarchical Reasoning System for Automatic Program Parallelization.
Int. J. Artif. Intell. Tools, 2000

1999
New Tiling Techniques to Improve Cache Temporal Locality.
Proceedings of the 1999 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), 1999

A Compiler Framework for Tiling Imperfectly-Nested Loops.
Proceedings of the Languages and Compilers for Parallel Computing, 1999

Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays.
Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, 1999

1998
An Efficient Solution to the Cache Thrashing Problem Caused by True Data Sharing.
IEEE Trans. Computers, 1998

Interprocedural Analysis for Loop Scheduling and Data Allocation.
Parallel Comput., 1998

Page-mapping techniques to reduce cache conflicts on CC-NUMA multiprocessors.
Microprocess. Microsystems, 1998

Integrating Parallelizing Compilation Technology and Processor Architecture for Cost-Effective Concurrent multithreading.
J. Inf. Sci. Eng., 1998

Introduction.
Int. J. Parallel Program., 1998

High-Level Information - An Approach for Integrating Front-End and Back-End Compilers.
Proceedings of the 1998 International Conference on Parallel Processing (ICPP '98), 1998

1997
Experience with Efficient Array Data-Flow Analysis for Array Privatization.
Proceedings of the Sixth ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming (PPOPP), 1997

1996
Compiler Techniques for Concurrent Multithreading with Hardware Speculation Support.
Proceedings of the Languages and Compilers for Parallel Computing, 1996

1995
Symbolic Array Dataflow Analysis for Array Privatization and Program Parallelization.
Proceedings of the Proceedings Supercomputing '95, San Diego, CA, USA, December 4-8, 1995, 1995

An Interprocedural Parallelizing Compiler and Its Support for Memory Hierarchy Research.
Proceedings of the Languages and Compilers for Parallel Computing, 1995

Use of embedded scheduling to compile VHDL for effective parallel simulation.
Proceedings of the Proceedings EURO-DAC'95, 1995

1994
Software Assistance for Directory-Based Caches.
Proceedings of the 8th International Symposium on Parallel Processing, 1994

A Compiler-Assisted Scheme for Adaptive Cache Coherence Enforcement.
Proceedings of the Parallel Architectures and Compilation Techniques, 1994

An evaluation of a compiler optimization for improving the performance of a coherence directory.
Proceedings of the 8th international conference on Supercomputing, 1994

An Empirical Study of the Workload Distribution Under Static Scheduling.
Proceedings of the 1994 International Conference on Parallel Processing, 1994

1993
Restructuring Fortran programs for Cedar.
Concurr. Pract. Exp., 1993


Efficient Use of Dynamically Tagged Directories Through Compiler Analysis
Proceedings of the 1993 International Conference on Parallel Processing, 1993

1992
Array privatization for parallel execution of loops.
Proceedings of the 6th international conference on Supercomputing, 1992

1991
Experience in the Automatic Parallelization of Four Perfect-Benchmark Programs.
Proceedings of the Languages and Compilers for Parallel Computing, 1991

Compiler algorithms for event variable synchronization.
Proceedings of the 5th international conference on Supercomputing, 1991

1990
An Empirical Study of Fortran Programs for Parallelizing Compilers.
IEEE Trans. Parallel Distributed Syst., 1990

An Efficient Data Dependence Analysis for Parallelizing Compilers.
IEEE Trans. Parallel Distributed Syst., 1990

1989
Intraprocedural and interprocedural data dependence analysis for parallel computing
PhD thesis, 1989

Solution of a Divide-and-Conquer Maximin Recurrence.
SIAM J. Comput., 1989

Data dependence analysis on multi-dimensional array references.
Proceedings of the 3rd international conference on Supercomputing, 1989

An Empirical Study on Array Subscripts and Data Dependencies.
Proceedings of the International Conference on Parallel Processing, 1989

1988
Program parallelization with interprocedural analysis.
J. Supercomput., 1988

Efficient Interprocedural Analysis for Program Parallelization and Restructuring.
Proceedings of the ACM/SIGPLAN PPEALS 1988, 1988

Interprocedural Analysis for Parallel Programs.
Proceedings of the International Conference on Parallel Processing, 1988

1987
On Reducing Data Synchronization in Multiprocessed Loops.
IEEE Trans. Computers, 1987

1985
A Technique for Reducing Synchronization Overhead in Large Scale Multiprocessors.
Proceedings of the 12th Annual Symposium on Computer Architecture, 1985


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