Ganesan Umanesan

According to our database, Ganesan Umanesan authored at least 13 papers between 2000 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

NoaSci: A Numerical Object Array Library for I/O of Scientific Applications on Object Storage.

Steven Wei Der Chien, Artur Podobas, Martin Svedin, Andriy Tkachuk, Salem El Sayed, Pawel Andrzej Herman, Ganesan Umanesan, Sai Narasimhamurthy, Stefano Markidis

Proceedings of the 30th Euromicro International Conference on Parallel, 2022

2019

SAGE: Percipient Storage for Exascale Data Centric Computing.

Sai Narasimhamurthy, Nikita Danilov, Sining Wu, Ganesan Umanesan, Stefano Markidis, Sergio Rivas-Gomez, Ivy Bo Peng, Erwin Laure, Dirk Pleiter, Shaun De Witt

Parallel Comput., 2019

2018

The SAGE Project: a Storage Centric Approach for Exascale Computing.

Sai Narasimhamurthy, Nikita Danilov, Sining Wu, Ganesan Umanesan, Steven Wei Der Chien, Sergio Rivas-Gomez, Ivy Bo Peng, Erwin Laure, Shaun De Witt, Dirk Pleiter, Stefano Markidis

CoRR, 2018

The SAGE project: a storage centric approach for exascale computing: invited paper.

Sai Narasimhamurthy, Nikita Danilov, Sining Wu, Ganesan Umanesan, Steven Wei Der Chien, Sergio Rivas-Gomez, Ivy Bo Peng, Erwin Laure, Shaun De Witt, Dirk Pleiter, Stefano Markidis

Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

2005

Parallel Decoding Cyclic Burst Error Correcting Codes.

Ganesan Umanesan, Eiji Fujiwara

IEEE Trans. Computers, 2005

2003

A Class of Random Multiple Bits in a Byte Error Correcting and Single Byte Error Detecting (S_t/b EC-S_bED) Codes.

Ganesan Umanesan, Eiji Fujiwara

IEEE Trans. Computers, 2003

A Class of Codes for Correcting Single Spotty Byte Errors.

Ganesan Umanesan, Eiji Fujiwara

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

2002

Single Byte Error Correcting Codes with Double Bit within a Block Error Correcting Capability for Memory Systems.

Ganesan Umanesan, Eiji Fujiwara

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

Adjacent Double Bit Error Correcting Codes with Single Byte Error Detecting Capability for Memory Systems.

Ganesan Umanesan, Eiji Fujiwara

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

Random Double Bit Error Correcting-Single <i>b</i>-<i>bit</i> Byte Error Correcting (DEC-S_bEC) Codes for Memory Systems.

Ganesan Umanesan, Eiji Fujiwara

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

A Class of Random Multiple Bits in a Byte Error Correcting (S t/b EC)Codes for Semiconductor Memory Systems.

Ganesan Umanesan, Eiji Fujiwara

Proceedings of the 9th Pacific Rim International Symposium on Dependable Computing (PRDC 2002), 2002

2001

A class of systematic t/B-error correcting codes for semiconductor memory systems.

Ganesan Umanesan, Eiji Fujiwara

Proceedings of the 2001 IEEE Information Theory Workshop, 2001

2000

Single Byte Error Control Codes with Double Bit within a Block Error Correcting Capability for Semiconductor Memory Systems.

Ganesan Umanesan, Eiji Fujiwara

Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000