Artur Podobas

Orcid: 0000-0001-5452-6794

According to our database1, Artur Podobas authored at least 62 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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On csauthors.net:

Bibliography

2024
Accelerating Scientific Application through Transparent I/O Interposition.
CoRR, 2024

2023
At the Locus of Performance: Quantifying the Effects of Copious 3D-Stacked Cache on HPC Workloads.
ACM Trans. Archit. Code Optim., December, 2023

Leveraging MLIR for Loop Vectorization and GPU Porting of FFT Libraries.
CoRR, 2023

Q2Logic: An Coarse-Grained Architecture targeting Schrödinger Quantum Circuit Simulations.
CoRR, 2023

VESTEC: Visual Exploration and Sampling Toolkit for Extreme Computing.
IEEE Access, 2023

Q2Logic: A Coarse-Grained FPGA Overlay targeting Schrödinger Quantum Circuit Simulations.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in HPC.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

Improving Cloud Storage Network Bandwidth Utilization of Scientific Applications.
Proceedings of the 7th Asia-Pacific Workshop on Networking, 2023

2022
At the Locus of Performance: A Case Study in Enhancing CPUs with Copious 3D-Stacked Cache.
CoRR, 2022

Workflows to Driving High-Performance Interactive Supercomputing for Urgent Decision Making.
Proceedings of the High Performance Computing. ISC High Performance 2022 International Workshops - Hamburg, Germany, May 29, 2022

Breaking Down the Parallel Performance of GROMACS, a High-Performance Molecular Dynamics Software.
Proceedings of the Parallel Processing and Applied Mathematics, 2022

NoaSci: A Numerical Object Array Library for I/O of Scientific Applications on Object Storage.
Proceedings of the 30th Euromicro International Conference on Parallel, 2022

Reducing communication in the conjugate gradient method: a case study on high-order finite elements.
Proceedings of the PASC '22: Platform for Advanced Scientific Computing Conference, Basel, Switzerland, June 27, 2022

The First International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing (CGRA4HPC).
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

Strong Scaling of OpenACC enabled Nek5000 on several GPU based HPC systems.
Proceedings of the HPC Asia 2022: International Conference on High Performance Computing in Asia-Pacific Region, Virtual Event, Japan, January 12, 2022

A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges.
Proceedings of the HPC Asia 2022: International Conference on High Performance Computing in Asia-Pacific Region, Virtual Event, Japan, January 12, 2022

Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage.
Proceedings of the International Conference on Field-Programmable Technology, 2022

FFTc: An MLIR Dialect for Developing HPC Fast Fourier Transform Libraries.
Proceedings of the Euro-Par 2022: Parallel Processing Workshops, 2022

The Cost of Flexibility: Embedded versus Discrete Routers in CGRAs for HPC.
Proceedings of the IEEE International Conference on Cluster Computing, 2022

2021
A Review on Parallel Virtual Screening Softwares for High Performance Computers.
CoRR, 2021

A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays.
CoRR, 2021

Neko: A Modern, Portable, and Scalable Framework for High-Fidelity Computational Fluid Dynamics.
CoRR, 2021

Benchmarking the Nvidia GPU Lineage.
CoRR, 2021

Utilising urgent computing to tackle the spread of mosquito-borne diseases.
Proceedings of the IEEE/ACM HPC for Urgent Decision Making, 2021

Mamba: Portable Array-based Abstractions for Heterogeneous High-Performance Systems.
Proceedings of the International Workshop on Performance, 2021

Accelerating Radiation Therapy Dose Calculation with Nvidia GPUs.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021

High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection.
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021

Matrix Engines for High Performance Computing: A Paragon of Performance or Grasping at Straws?
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021

Benchmarking the Nvidia GPU Lineage: From Early K80 to Modern A100 with Asynchronous Memory Transfers.
Proceedings of the HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2021

StreamBrain: An HPC Framework for Brain-like Neural Networks on CPUs, GPUs and FPGAs.
Proceedings of the HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2021

Higgs Boson Classification: Brain-inspired BCPNN Learning with StreamBrain.
Proceedings of the IEEE International Conference on Cluster Computing, 2021

2020
High-Performance Spectral Element Methods on Field-Programmable Gate Arrays.
CoRR, 2020

Optimization of Tensor-product Operations in Nekbone on GPUs.
CoRR, 2020

White Paper from Workshop on Large-scale Parallel Numerical Computing Technology (LSPANC 2020): HPC and Computer Arithmetic toward Minimal-Precision Computing.
CoRR, 2020

A Survey on Coarse-Grained Reconfigurable Architectures From a Performance Perspective.
IEEE Access, 2020

Automatic Particle Trajectory Classification in Plasma Simulations.
Proceedings of the 6th IEEE/ACM Workshop on Machine Learning in High Performance Computing Environments, 2020

sputniPIC: An Implicit Particle-in-Cell Code for Multi-GPU Systems.
Proceedings of the 32nd IEEE International Symposium on Computer Architecture and High Performance Computing, 2020

OpenMP Device Offloading to FPGAs Using the Nymble Infrastructure.
Proceedings of the OpenMP: Portable Multi-Level Parallelism on Modern Systems, 2020

Extending High-Level Synthesis with High-Performance Computing Performance Visualization.
Proceedings of the IEEE International Conference on Cluster Computing, 2020

tf-Darshan: Understanding Fine-grained I/O Performance in Machine Learning Workloads.
Proceedings of the IEEE International Conference on Cluster Computing, 2020

A Template-based Framework for Exploring Coarse-Grained Reconfigurable Architectures.
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020

2019
Learning Neural Representations for Predicting GPU Performance.
Proceedings of the High Performance Computing - 34th International Conference, 2019

Double-Precision FPUs in High-Performance Computing: An Embarrassment of Riches?
Proceedings of the 2019 IEEE International Parallel and Distributed Processing Symposium, 2019

Scaling Performance for N-Body Stream Computation with a Ring of FPGAs.
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2019

2018
MACC: An OpenACC Transpiler for Automatic Multi-GPU Use.
Proceedings of the Supercomputing Frontiers - 4th Asian Conference, 2018

High-Performance High-Order Stencil Computation on FPGAs Using OpenCL.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Hardware Implementation of POSITs and Their Application in FPGAs.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Combined Spatial and Temporal Blocking for High-Performance Stencil Computation on FPGAs Using OpenCL.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Predicting Performance Using Collaborative Filtering.
Proceedings of the IEEE International Conference on Cluster Computing, 2018

2017
Designing and accelerating spiking neural networks using OpenCL for FPGAs.
Proceedings of the International Conference on Field Programmable Technology, 2017

Evaluating high-level design strategies on FPGAs for high-performance computing.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
Empowering OpenMP with automatically generated hardware.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Grain graphs: OpenMP performance analysis made easy.
Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2016

Towards Unifying OpenMP Under the Task-Parallel Paradigm - Implementation and Performance of the taskloop Construct.
Proceedings of the OpenMP: Memory, Devices, and Tasks, 2016

2015
Improving Performance and Quality-of-Service through the Task-Parallel Model : Optimizations and Future Directions for OpenMP.
PhD thesis, 2015

A comparative performance study of common and popular task-centric programming frameworks.
Concurr. Comput. Pract. Exp., 2015

Using Transactional Memory to Avoid Blocking in OpenMP Synchronization Directives - Don't Wait, Speculate!
Proceedings of the OpenMP: Heterogenous Execution and Data Movements, 2015

2014
Accelerating Parallel Computations with OpenMP-Driven System-on-Chip Generation for FPGAs.
Proceedings of the IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs, 2014

TurboBŁYSK: Scheduling for Improved Data-Driven Task Performance with Fast Dependency Resolution.
Proceedings of the Using and Improving OpenMP for Devices, Tasks, and More, 2014

2012
Exploring Heterogeneous Scheduling Using the Task-Centric Programming Model.
Proceedings of the Euro-Par 2012: Parallel Processing Workshops, 2012

Task Scheduling on Manycore Processors with Home Caches.
Proceedings of the Euro-Par 2012: Parallel Processing Workshops, 2012


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