Gang Li
Orcid: 0000-0001-7835-4739Affiliations:
- Shanghai Jiao Tong University, China
- Chinese Academy of Sciences, Institute of Automation, National Laboratory of Pattern Recognition, Beijing, China (former)
According to our database1,
Gang Li
authored at least 31 papers
between 2018 and 2025.
Collaborative distances:
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Bibliography
2025
GCC: A 3DGS Inference Architecture with Gaussian-Wise and Cross-Stage Conditional Processing.
CoRR, July, 2025
CoRR, June, 2025
GSArch: Breaking Memory Barriers in 3D Gaussian Splatting Training via Architectural Support.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025
Light-DiT: An Importance-Aware Dynamic Compression Framework for Diffusion Transformers.
Proceedings of the Euro-Par 2025: Parallel Processing, 2025
SBQ: Exploiting Significant Bits for Efficient and Accurate Post-Training DNN Quantization.
Proceedings of the Design, Automation & Test in Europe Conference, 2025
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024
MEGA: A Memory-Efficient GNN Accelerator Exploiting Degree-Aware Mixed-Precision Quantization.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
FastGL: A GPU-Efficient Framework for Accelerating Sampling-Based GNN Training at Large Scale.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024
2023
Extremely Sparse Networks via Binary Augmented Pruning for Fast Image Classification.
IEEE Trans. Neural Networks Learn. Syst., August, 2023
IEEE Trans. Circuits Syst. II Express Briefs, July, 2023
Proceedings of the Eleventh International Conference on Learning Representations, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Ristretto: An Atomized Processing Architecture for Sparsity-Condensed Stream Flow in CNN.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
Proceedings of the Computer Vision - ECCV 2022, 2022
2021
CoRR, 2021
Proceedings of the 2021 IEEE/CVF International Conference on Computer Vision, 2021
Hardware Acceleration of Fully Quantized BERT for Efficient Natural Language Processing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Findings of the Association for Computational Linguistics: ACL/IJCNLP 2021, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Proceedings of the IEEE International Conference on Image Processing, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the Thirty-Fourth AAAI Conference on Artificial Intelligence, 2020
2019
Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision Workshops, 2019
2018
Frontiers Inf. Technol. Electron. Eng., 2018
Proceedings of the Computer Vision - ECCV 2018, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018