Gianmarco Dinelli
Orcid: 0000-0003-0123-7977
According to our database1,
Gianmarco Dinelli
authored at least 10 papers
between 2018 and 2021.
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Bibliography
2021
An FPGA-Based Hardware Accelerator for CNNs Inference on Board Satellites: Benchmarking with Myriad 2-Based Solution for the CloudScout Case Study.
Remote. Sens., 2021
2020
MEM-OPT: A Scheduling and Data Re-Use System to Optimize On-Chip Memory Usage for CNNs On-Board FPGAs.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
A Complete EGSE Solution for the SpaceWire and SpaceFibre Protocol Based on the PXI Industry Standard.
Sensors, 2019
An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick.
Int. J. Reconfigurable Comput., 2019
A Configurable Hardware Word Re-Ordering Block for Multi-Lane Communication Protocols: Design and Use Case.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019
AXI4LV: Design and Implementation of a Full-Speed AMBA AXI4-Burst DMA Interface for LabVIEW FPGA.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019
Integration of a SpaceFibre IP Core with the LEON3 Microprocessor Through an AMBA AHB Bus.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019
2018
A SpaceFibre multi lane codec System on a Chip: enabling technology for low cost satellite EGSE.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018