Gianluca Furano

Orcid: 0000-0001-7624-1415

According to our database1, Gianluca Furano authored at least 27 papers between 2014 and 2023.

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Bibliography

2023
Neutron Radiation Tests of the NEORV32 RISC-V SoC on Flash-Based FPGAs.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023


Machine Learning Application Benchmark.
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2022
The Φ-Sat-1 Mission: The First On-Board Deep Neural Network Demonstrator for Satellite Earth Observation.
IEEE Trans. Geosci. Remote. Sens., 2022

Is RISC-V ready for Space? A Security Perspective.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

Preventing Soft Errors and Hardware Trojans in RISC-V Cores.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

2021
On-Board Decision Making in Space with Deep Neural Networks and RISC-V Vector Processors.
J. Aerosp. Inf. Syst., August, 2021

Guest Editorial: IEEE Transactions on Emerging Topics in Computing Special Issue on Advanced Command, Control and On-Board Data Processing for Space Avionic Systems.
IEEE Trans. Emerg. Top. Comput., 2021

Improving Performance-Power-Programmability in Space Avionics with Edge Devices: VBN on Myriad2 SoC.
ACM Trans. Embed. Comput. Syst., 2021

An FPGA-Based Hardware Accelerator for CNNs Inference on Board Satellites: Benchmarking with Myriad 2-Based Solution for the CloudScout Case Study.
Remote. Sens., 2021

Open-source IP cores for space: A processor-level perspective on soft errors in the RISC-V era.
Comput. Sci. Rev., 2021

2020
Efficient Star Identification Using a Neural Network.
Sensors, 2020

A Survey of Lost-in-Space Star Identification Algorithms Since 2009.
Sensors, 2020

AI in space: applications examples and challenges.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

On-Board Satellite Telemetry Forecasting with RNN on RISC-V Based Multicore Processor.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

2019
Leveraging the Openness and Modularity of RISC-V in Space.
J. Aerosp. Inf. Syst., November, 2019

Design and Implementation of a Flexible Interface for TID Detector.
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019

On the Criticality of Caches in Fault-Tolerant Processors for Space.
Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019

A Fault-Tolerant MPSoC For CubeSats.
Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019

2018
High-Performance Embedded Computing in Space: Evaluation of Platforms for Vision-Based Navigation.
J. Aerosp. Inf. Syst., April, 2018

Setup and experimental results analysis of COTS Camera and SRAMs at the ISIS neutron facility.
Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018

FPGA SEE Test with Ultra-High Energy Heavy Ions.
Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

The Case for RISC-V in Space.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2018

2017
High-energy neutrons characterization of a safety critical computing system.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

2016
Qualitative techniques for System-on-Chip test with low-energy protons.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

A novel method for SEE validation of complex SoCs using Low-Energy Proton beams.
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016

2014
Characterization of data retention faults in DRAM devices.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014


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