Giri Devarayanadurg

According to our database, Giri Devarayanadurg authored at least 7 papers between 1994 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

Accurate power grid analysis with behavioral transistor network modeling.

Anand Ramalingam, Giri Devarayanadurg, David Z. Pan

Proceedings of the 2007 International Symposium on Physical Design, 2007

2001

Hierarchical ATPG for Analog Circuits and Systems.

Mani Soma, Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg

IEEE Des. Test Comput., 2001

1999

Test set selection for structural faults in analog IC's.

Giri Devarayanadurg, Mani Soma, Prashant Goteti, Sam D. Huynh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Efficient Test Set Design for Analog and Mixed-Signal Circuits and Systems.

Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg, Mani Soma

Proceedings of the 8th Asian Test Symposium (ATS '99), 1999

1996

Hierarchy Based Statistical Fault Simulation of Mixed-Signal ICs.

Giri Devarayanadurg, Prashant Goteti, Mani Soma

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1995

Dynamic test signal design for analog ICs.

Giri Devarayanadurg, Mani Soma

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994

Analytical fault modeling and static test generation for analog ICs.

Giri Devarayanadurg, Mani Soma

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994