Mani Soma

According to our database, Mani Soma authored at least 83 papers between 1988 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Statistical computational methods for mixed-signal performance metrics under process variations and noise models.

Mani Soma, Tong Zhang, Jacques Christophe Rudell

Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

2015

A new method for measuring alias-free aperture jitter in an ADC output.

Takahiro J. Yamaguchi, Katsuhiko Degawa, Masayuki Kawabata, Masahiro Ishida, Koichiro Uekusa, Mani Soma

Proceedings of the 2015 IEEE International Test Conference, 2015

On-line detection of intermittent faults in digital-to-analog converters.

Mani Soma

Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

2014

Special session 8C: Hot topic: Designers' and test researchers' roles in analog design-for-test.

Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Terri S. Fiez, Mike Peng Li

Proceedings of the 32nd IEEE VLSI Test Symposium, 2014

A method for phase noise extraction from data communication.

Allan Ecker, Mani Soma

Proceedings of the 32nd IEEE VLSI Test Symposium, 2014

Analog fault models: Back to the future?

Mani Soma

Proceedings of the 2014 International Test Conference, 2014

2013

On the usage of resonate and fire dynamics in the complex oscillation-based test approach.

Sergio Callegari, Fabio Pareschi, Gianluca Setti, Mani Soma

Int. J. Circuit Theory Appl., 2013

2012

A digital method for phase noise measurement.

Allan Ecker, Kenneth Blakkan, Mani Soma

Proceedings of the 2012 IEEE International Test Conference, 2012

2011

Application of a continuous-time level crossing quantization method for timing noise measurements.

Takahiro J. Yamaguchi, Mani Soma, Takafumi Aoki, Yasuo Furukawa, Katsuhiko Degawa, Kunihiro Asada, Mohamed Abbas, Satoshi Komatsu

Proceedings of the 2011 IEEE International Test Conference, 2011

An equivalent-time and clocked approach for continuous-time quantization.

Takahiro J. Yamaguchi, Mohamed Abbas, Mani Soma, Takafumi Aoki, Yasuo Furukawa, Katsuhiko Degawa, Satoshi Komatsu, Kunihiro Asada

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Resonate and fire dynamics in Complex Oscillation Based Test of analog filters.

Sergio Callegari, Fabio Pareschi, Gianluca Setti, Mani Soma

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010

Complex Oscillation-Based Test and Its Application to Analog Filters.

Sergio Callegari, Fabio Pareschi, Gianluca Setti, Mani Soma

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009

A Time Domain Method to Measure Oscillator Phase Noise.

Kenneth Blakkan, Mani Soma

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Complex Oscillation Based Test of Analog Filters.

Sergio Callegari, Gianluca Setti, Mani Soma

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

A Time-Domain Method for Pseudo-Spectral Characterization.

Apurva Mishra, Mani Soma

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

A New Method for Measuring Aperture Jitter in ADC Output and Its Application to ENOB Testing.

Takahiro J. Yamaguchi, Masayuki Kawabata, Mani Soma, Masahiro Ishida, K. Sawami, Koichiro Uekusa

Proceedings of the 2008 IEEE International Test Conference, 2008

Enhancing industry participation in ISCAS and Circuits and Systems Society.

Mani Soma

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

An FFT-based jitter separation method for high-frequency jitter testing with a 10x reduction in test time.

Takahiro J. Yamaguchi, H. X. Hou, Koji Takayama, Dave Armstrong, Masahiro Ishida, Mani Soma

Proceedings of the 2007 IEEE International Test Conference, 2007

Data jitter measurement using a delta-time-to-voltage converter method.

Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma

Proceedings of the 2007 IEEE International Test Conference, 2007

An On-Chip Delta-Time-to-Voltage Converter for Real-Time Measurement of Clock Jitter.

Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Mismatch-Tolerant Circuit for On-Chip Measurements of Data Jitter.

Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

Method to measure RF transceiver bandwidth in the time domain.

Qi Wang, Yi Tang, Mani Soma

IEEE Trans. Instrum. Meas., 2006

RF Front-end System Gain and Linearity Built-in Test.

Qi Wang, Mani Soma

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

A Study of Per-Pin Timing Jitter Scope.

Takahiro J. Yamaguchi, Satoshi Iwamoto, Masahiro Ishida, Mani Soma

Proceedings of the 2006 IEEE International Test Conference, 2006

A Real-Time Delta-Time-to-Voltage Converter for Clock Jitter Measurement.

Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma

Proceedings of the 2006 IEEE International Test Conference, 2006

2005

Special issue on BIT CMOS built-in test architecture for high-speed jitter measurement.

Karen Taylor, Bryan Nelson, Alan Chong, Henry C. Lin, Eddie Chan, Mani Soma, Hosam Haggag, Jeff Huard, Jim Braatz

IEEE Trans. Instrum. Meas., 2005

A wideband low-noise ATE-based method for measuring jitter in GHz signals.

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Guaranteed by design or guaranteed to fail or guaranteed by test? or ... neither?

Mani Soma

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

A statistical study of the effectiveness of BIST jitter measurement techniques.

David Bordoley, Hieu Nguyen, Mani Soma

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

2004

Skew measurements in clock distribution circuits using an analytic signal method.

Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

GHz RF Front-end Bandwidth Time Domain Measurement.

Qi Wang, Yi Tang, Mani Soma

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

A Real-Time Jitter Measurement Board for High-Performance Computer and Communication Systems.

Takahiro J. Yamaguchi, Masahiro Ishida, Kiyotaka Ichiyama, Mani Soma, Christian Krawinkel, Katsuaki Ohsawa, Masao Sugai

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Experimental Results for High-Speed Jitter Measurement Technique.

Karen Taylor, Bryan Nelson, Alan Chong, Hieu Nguyen, Henry C. Lin, Mani Soma, Hosam Haggag, Jeff Huard, Jim Braatz

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

On-chip calibration technique for delay line based BIST jitter measurement.

Bryan Nelson, Mani Soma

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

Extraction of instantaneous and RMS sinusoidal jitter using an analytic signal method.

Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Toshifumi Watanabe, Tadahiro Ohmi

IEEE Trans. Circuits Syst. II Express Briefs, 2003

Layout driven synthesis of multiple scan chains.

Kianosh Rahimi, Mani Soma

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Timing Jitter Measurement of Intrinsic Random Jitter and Sinusoidal Jitter Using Frequency Division.

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha

J. Electron. Test., 2003

Measurement of Phase and Frequency Variations in Radio-Frequency Signal.

Mani Soma, Welela Haileselassie, Jessica Sherrid

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Effects of Deterministic Jitter in a Cable on Jitter Tolerance Measurements.

Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Makoto Kurosawa, Hirobumi Musha

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

CMOS Built-In Test Architecture for High-Speed Jitter Measurement.

Henry C. Lin, Karen Taylor, Alan Chong, Eddie Chan, Mani Soma, Hosam Haggag, Jeff Huard, Jim Braatz

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2002

Timing Jitter Measurement of 10 Gbps Bit Clock Signals Using Frequency Division.

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha

Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter.

Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Hirobumi Musha, Louis Malarsie

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

A Wavelet-Based Timing Parameter Extraction Method.

Mani Soma, Welela Haileselassie, Jessica Yan, Rajesh Raina

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Effects of Amplitude Modulation in Jitter Tolerance Measurements of Communication Devices.

Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Hirobumi Musha

Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002

2001

Hierarchical ATPG for Analog Circuits and Systems.

Mani Soma, Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg

IEEE Des. Test Comput., 2001

A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals.

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, David Halter, Rajesh Raina, Jim Nissen

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Analog and Mixed Signal Benchmark Circuit Development: Who Needs Them?

Henry Chang, Steve Dollens, Gordon W. Roberts, Charles E. Stroud, Mani Soma, Jacob A. Abraham

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Mixed-signal RF Design-for-Test: Is It R (Real) or F (Fake)?

Mani Soma

Proceedings of the 2nd Latin American Test Workshop, 2001

Testing clock distribution circuits using an analytic signal method.

Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Test evaluation and data on defect-oriented BIST architecture for high-speed PLL.

Seongwon Kim, Mani Soma

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

2000

Extraction of Peak-to-Peak and RMS Sinusoidal Jitter Using an Analytic Signal Method.

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Toshifumi Watanabe, Tadahiro Ohmi

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

An Effective Defect-Oriented BIST Architecture for High-Speed Phase-Locked Loops.

Seongwon Kim, Mani Soma, Dilip Risbud

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Jitter measurements of a PowerPC^TM microprocessor using an analytic signal method.

Takahiro J. Yamaguchi, Mani Soma, David Halter, Jim Nissen, Rajesh Raina, Masahiro Ishida, Toshifumi Watanabe

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

1999

Test set selection for structural faults in analog IC's.

Giri Devarayanadurg, Mani Soma, Prashant Goteti, Sam D. Huynh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

A Test Point Insertion Algorithm for Mixed-Signal Circuits.

Jinyan Zhang, Sam D. Huynh, Mani Soma

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

Panel Statement: Increasing test coverage in a VLSI design course.

Mani Soma

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Self-checking scheme for very fast clocks' skew correction.

Cecilia Metra, Flavio Giovanelli, Mani Soma, Bruno Riccò

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Efficient Test Set Design for Analog and Mixed-Signal Circuits and Systems.

Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg, Mani Soma

Proceedings of the 8th Asian Test Symposium (ATS '99), 1999

1998

Mixed-signal on-chip timing measurements.

Mani Soma

Integr., 1998

Testability analysis and multi-frequency ATPG for analog circuits and systems.

Sam D. Huynh, Seongwon Kim, Mani Soma, Jinyan Zhang

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Dynamic Test Set Generation for Analog Circuits and Systems.

Sam D. Huynh, Seongwon Kim, Mani Soma, Jinyan Zhang

Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

1997

Statistical estimation of delay-dependent switching activities in embedded CMOS combinational circuits.

Yong Je Lim, Mani Soma

IEEE Trans. Very Large Scale Integr. Syst., 1997

Analytical model for switching transitions of submicron CMOS logics.

Heung-Joon Park, Mani Soma

IEEE J. Solid State Circuits, 1997

Dynamic Testing of ADCs Using Wavelet Transforms.

Takahiro J. Yamaguchi, Mani Soma

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Analog and Mixed-Signal Benchmark Circuits-First Release.

Bozena Kaminska, Karim Arabi, I. Bell, José L. Huertas, Bruce C. Kim, Adoración Rueda, Mani Soma, Prashant Goteti

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Experimental Results for Current-Based Analog Scan.

Thomas M. Bocek, Tuyen D. Vu, Mani Soma, Jason D. Moffatt

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1996

Hierarchy Based Statistical Fault Simulation of Mixed-Signal ICs.

Giri Devarayanadurg, Prashant Goteti, Mani Soma

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

A Statistical Approach to the Estimation of Delay Dependent Switching Activities in CMOS Combinational Circuits.

Yong Je Lim, Kyung-Im Son, Heung-Joon Park, Mani Soma

Proceedings of the 33st Conference on Design Automation, 1996

1995

Dynamic test signal design for analog ICs.

Giri Devarayanadurg, Mani Soma

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994

A design-for-test technique for switched-capacitor filters.

Mani Soma, Vladimir Kolarik

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

Analytical fault modeling and static test generation for analog ICs.

Giri Devarayanadurg, Mani Soma

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993

Guest editor's introduction.

Mani Soma

J. Electron. Test., 1993

Fault Coverage of DC Parametric Tests for Embedded Analog Amplifiers.

Mani Soma

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

Fault Diagnosis of Flash ADC using DNL Test.

Anchada Charoenrook, Mani Soma

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1992

Guest Editor's Introduction: Mixing Analog and Digital Systems.

Mani Soma

IEEE Des. Test Comput., 1992

1991

Probabilistic measures of fault equivalence in mixed-signal systems.

Mani Soma

Proceedings of the 9th IEEE VLSI Test Symposium (VTS'91), 1991

1990

Mixed digital/analog VLSI array architectures for image processing.

Mani Soma, Thomas Alexander

Proceedings of the Visual Communications and Image Processing '90: Fifth in a Series, 1990

A design-for-test methodology for active analog filters.

Mani Soma

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

Experimental evaluation of concurrent fault simulation algorithms on scalable, hierarchically defined test cases.

William H. Nicholls, Arnold W. Nordsieck, Mani Soma

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

Minimal overhead modification of iterative logic arrays for C-testability.

Tsu-Wei Ku, Mani Soma

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

1989

A circuit model for the adaptive properties of neural networks.

Mani Soma

Proceedings of the IEEE International Conference on Systems, 1989

1988

Fault Bundling: Reducing Machine Evaluation Activity in Hierarchical Concurrent Fault Simulation.

William H. Nicholls, Mani Soma

Proceedings of the Proceedings International Test Conference 1988, 1988

A BIST Design of Structured Arrays with Fault-Tolerant Layout.

Mehdi Katoozi, Mani Soma

Proceedings of the Proceedings International Test Conference 1988, 1988