Gopi Ganapathy

According to our database1, Gopi Ganapathy authored at least 4 papers between 1991 and 1996.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1996
Practical Test and DFT for Next Generation VLSI.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

Hardware Emulation for Functional Verification of K5.
Proceedings of the 33st Conference on Design Automation, 1996

1993
Selective Pseudo Scan: Combinational ATPG with Reduced Scan in a Full Custom RISC Microprocessor.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

1991
Hardware Acceleration Alone Will Not Make Fault Grading ULSI a Reality.
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991


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