Hang Hu

Affiliations:
  • Fudan University, Department of Microelectronics, State Key Laboratory of ASIC and System, Shanghai, China


According to our database1, Hang Hu authored at least 9 papers between 2017 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2018
A Time-Interleaved SAR Assisted Pipeline ADC With a Bias-Enhanced Ring Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A Third-order Band-pass Fully-passive Noise-Shaping Modulator Based on a Time-interleaved SAR ADC.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

A 12-Bit ENOB 8MHz BW Noise-Shaping SAR ADC Using High-Speed Switches.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2017
High speed digital ELD compensation with hybrid thermometer coding in CT ΔΣ modulators.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A 200MS/s, 11 bit SAR-assisted pipeline ADC with bias-enhanced ring amplifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A 12bit asynchronous SAR-incremental sub-range ADC.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

A 15MHz BW continuous-time ΔΣ modulator with high speed digital ELD compensation.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

A 320MS/s 7-b flash-SAR ADC with preamplifier sharing technique.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

A 0.87 mW 7MHz-BW 76dB-SNDR passive noise-shaping modulator based on a SAR ADC.
Proceedings of the 12th IEEE International Conference on ASIC, 2017


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